Data Transfer Technology Selection for Storage Systems
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Solution Overview
Problem
In data storage systems involving large data transfers, the central processing unit (CPU) load becomes heavy due to waiting for input/output operations on persistent memory, leading to decreased system performance and potential stalls.
Innovation Solution
A method to dynamically determine a target transfer technology based on the CPU utilization rate, switching between CPU memory replication technology and direct memory access (DMA) technology to balance CPU load and data transfer delay, optimizing data transfer performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data transfer uses CPU memory replication technology, then data transfer reliability is improved, but CPU utilization increases and system performance decreases
Solution Approach 1:
The patent implements dynamic selection between CPU memory replication technology and DMA technology based on real-time CPU utilization rate. When CPU utilization exceeds a threshold, the system switches to DMA technology to reduce CPU load; when CPU utilization is below the threshold, the system uses CPU memory replication technology to ensure data transfer reliability. This dynamic adaptation resolves the contradiction by allowing the system to switch between reliability-oriented and performance-oriented modes.
Solution Approach 2:
The patent changes the operational parameter (transfer technology type) based on the CPU utilization rate parameter. By monitoring CPU utilization and adjusting the data transfer method accordingly, the system optimizes the balance between reliability and productivity. This parameter-based control enables the system to adapt to varying workload conditions and resolve the contradiction between reliable data transfer and system performance.
2Measurement precision
If data transfer uses CPU memory replication technology, then data transfer accuracy is improved, but CPU stall time increases
Solution Approach 1:
The system dynamically switches between CPU memory replication technology and DMA technology based on CPU utilization rate. When CPU utilization is high, the system transitions to DMA technology to eliminate CPU stalls and prevent time loss, while maintaining data transfer accuracy through DMA's reliable transfer capabilities. This dynamic switching resolves the contradiction between data transfer accuracy and CPU stall time.
Solution Approach 2:
The patent introduces DMA (Direct Memory Access) as an intermediary mechanism to handle data transfers when CPU utilization is high. DMA acts as a mediator that can perform data transfers independently without occupying the CPU, thereby eliminating CPU stalls while maintaining data transfer accuracy. This intermediary approach resolves the contradiction by offloading the transfer task from the CPU to a dedicated DMA controller.
3Productivity
If data transfer uses DMA technology, then CPU load is reduced, but data transfer delay increases
Solution Approach 1:
The system dynamically selects between DMA technology and CPU memory replication technology based on CPU utilization rate. When CPU utilization is below the threshold, the system uses CPU memory replication technology which provides faster data transfer with lower delay. When CPU utilization exceeds the threshold, the system switches to DMA technology to reduce CPU load. This dynamic selection resolves the contradiction by optimizing the trade-off between CPU load reduction and data transfer delay based on real-time system conditions.
Solution Approach 2:
The patent changes the data transfer method parameter based on CPU utilization rate parameter. By adjusting this parameter dynamically, the system optimizes the balance between reducing CPU load and minimizing data transfer delay. This parameter-based control strategy resolves the contradiction by allowing the system to adapt to varying workload conditions and select the most appropriate transfer method.
4Reliability
If CPU waits for I/O operations to complete, then data integrity is ensured, but system throughput decreases
Solution Approach 1:
The patent introduces DMA as an intermediary that handles data transfers independently of the CPU. When CPU utilization is high, DMA performs data transfers without requiring CPU intervention, thereby maintaining data integrity through DMA's reliable transfer mechanism while preventing CPU stalls. This intermediary approach resolves the contradiction between data integrity and system throughput by allowing parallel operation of CPU and DMA.
Solution Approach 2:
The system dynamically switches between CPU memory replication technology and DMA technology based on CPU utilization rate. When CPU utilization is high, the system transitions to DMA technology to enable concurrent data transfers without CPU waiting, thus maintaining data integrity while improving system throughput. This dynamic adaptation resolves the contradiction by allowing the system to operate in a mode that enables parallel processing when needed.
Data Source
AI summary
Embodiments of the present disclosure relate to a method, a device, and a computer program product for managing data transfer. A method for managing data transfer is provided, including: if determining that a request to transfer a data block between a memory and a persistent memory of a data storage system is received, obtaining a utilization rate of a central processing unit of the data storage system; and determining, from a first transfer technology and a second transfer technology and at least based on the utilization rate of the central processing unit, a target transfer technology for transferring a data block between the memory and the persistent memory, the first transfer technology transferring data through direct access to the memory, and the second transfer technology transferring data through the central processing unit. Therefore, the embodiments of the present disclosure can improve the data transfer performance of the storage system.