Asynchronous Data Transfer Circuit Strobe Synchronization
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Solution Overview
Problem
Conventional asynchronous data transfer circuits face issues when clock signals of different cycles are used, leading to unreliable data transfer due to phase relationships and potential early or uncertain output of data, especially when the reception side clock cycle is longer or shorter than the transmission side clock cycle.
Innovation Solution
A data transfer circuit with a strobe generation unit on the transmission side and an edge detection unit on the reception side, utilizing a valid signal with a pulse width corresponding to one cycle of the reception clock, ensures reliable data transfer by synchronizing data transfer with the reception clock, even when clock frequencies differ.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous data transfer is used between circuits with different clock frequencies, then data transfer flexibility is improved, but data transfer reliability deteriorates due to phase relationship issues between clocks
Solution Approach 1:
The patent introduces a strobe signal as an intermediary between the transmission side and reception side. This strobe signal serves as a mediator that coordinates the asynchronous clock domains, enabling reliable data transfer without requiring fixed phase relationships between the different frequency clocks. The strobe signal acts as a handshake mechanism that bridges the two asynchronous systems.
Solution Approach 2:
The transmission side generates the strobe signal in advance before data transfer occurs. This preliminary action of generating the strobe signal allows the reception side to be prepared and synchronized to the correct timing, ensuring that data is captured reliably even though the receiving clock operates at a different frequency than the transmitting clock.
2Productivity
If the reception side clock cycle is longer than the transmission side clock cycle, then the circuit can handle slower reception speeds, but the transfer reference signal cannot be loaded properly due to phase misalignment
Solution Approach 1:
The strobe signal serves as a mediator that resolves the timing mismatch between the faster transmission clock and the slower reception clock. By using this intermediary signal, the reception side can properly sample the transfer reference signal and data at the correct moments, regardless of the phase relationship between the two different frequency clocks.
3Productivity
If the reception side clock cycle is shorter than the transmission side clock cycle, then the circuit can handle faster reception speeds, but the valid signal may be output before data verification
Solution Approach 1:
The transmission side generates the strobe signal in advance to indicate when data is ready for transfer. This preliminary action ensures that the reception side waits for the appropriate timing signal before attempting to load data, preventing premature output of valid signals before data verification is complete.
Solution Approach 2:
The strobe signal provides feedback timing information from the transmission side to the reception side. This feedback mechanism ensures that the reception side operates in synchronization with the actual data availability, preventing early or incorrect data output even when the reception clock runs faster than the transmission clock.
Data Source
AI summary
A transmission unit loads transmission data on a first register and outputs it to a transfer line and starts counting the transmission clock signals in a strobe generation counter according to a transmission clock signal. When the counted value reaches a set value, a strobe signal is output. A reception unit loads the transfer data onto a second register according to a reception clock signal. An edge detection unit generates a valid signal with a pulse width corresponding to one cycle of the reception clock signal when the strobe signal is detected. A third register loads the data that is output from the second register, and outputs it as reception data according to the reception clock signal when the valid signal is supplied.