Data Transfer Control Circuitry With Three-Rate Matching
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Solution Overview
Problem
Traditional data transfer methods between nodes in circuit architectures, such as Chiplet architecture, are inefficient, leading to increased latency and data accumulation due to credit control frameworks, which cause stop-and-go data transmission.
Innovation Solution
A data transfer framework that sets the data transfer rate based on the lowest of three maximum rates: the rate at which the first node can release data, the rate at which data can pass through the link, and the rate at which the second node can receive data, ensuring synchronous data transmission and reducing latency by using flow-control circuitry to manage data flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If credit control framework is used for data transfer, then data overflow at receiving node is avoided, but latency increases and data transmission becomes stop-and-go
Solution Approach 1:
The patent applies preliminary action by proactively determining the three maximum rates (first node release rate, link transmission rate, second node receive rate) before data transfer begins. The flow-control circuitry pre-calculates the designated frequency based on these rates, allowing continuous data transmission without waiting for credit signals from the receiving node, thus eliminating stop-and-go transmission while preventing overflow through advance rate matching.
Solution Approach 2:
The patent implements feedback by continuously monitoring the actual data transfer rates at each node and link, then using this feedback to dynamically adjust the designated frequency. The flow-control circuitry receives feedback about the lowest of the three maximum rates and modifies the transmission frequency accordingly, ensuring optimal continuous data flow that prevents overflow while minimizing latency through adaptive rate control.
2Reliability
If credit control framework is used for data transfer, then data overflow at receiving node is avoided, but data accumulation at transmitting node increases
Solution Approach 1:
The patent applies preliminary action by pre-determining the three maximum rates (first node release rate, link transmission rate, second node receive rate) before data transfer begins. The flow-control circuitry pre-calculates the designated frequency based on these rates, allowing continuous data transmission without waiting for credit signals from the receiving node, thus eliminating stop-and-go transmission while preventing overflow through advance rate matching.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the data transfer frequency based on the lowest of the three maximum rates. The flow-control circuitry changes the transmission parameter (frequency) to match the bottleneck rate among the three components, ensuring continuous data flow that prevents accumulation at the transmitting node while avoiding overflow at the receiving node.
3Reliability
If traditional data transfer methods are used, then data transfer control is achieved, but transfer efficiency decreases
Solution Approach 1:
The patent applies continuity of useful action by enabling continuous data transmission from the first node to the second node without stop-and-go interruptions. The flow-control circuitry maintains continuous data flow by synchronizing the transfer rate with the lowest of the three maximum rates, ensuring that data transmission is ongoing and efficient rather than intermittent, thus significantly improving transfer productivity while maintaining reliable control.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the data transfer frequency based on the lowest of the three maximum rates. The flow-control circuitry changes the transmission parameter (frequency) to match the bottleneck rate among the three components, ensuring continuous data flow that prevents accumulation at the transmitting node while avoiding overflow at the receiving node.
Data Source
AI summary
The disclosed device includes a first node, a second node, a link, and flow-control circuitry configured to transmit data through the link, from the first node to the second node, at a designated frequency corresponding to the lowest of three maximum frequencies (e.g., a first maximum frequency at which the first node is predicted to be able to release data, a second maximum frequency at which data is predicted to be able to pass through the link from the first node to the second node, and a third maximum frequency at which the second node is predicted to be able to receive data). Various other methods, systems, and computer-readable media are also disclosed.