Data Transmission Circuit Parallel Reading for DRAM Error Correction
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Solution Overview
Problem
The existing dynamic random access memory (DRAM) systems experience reduced processing speed due to the serial querying and replacement process when a normal storage array is damaged, which increases the time required for error detection and correction, especially during global repair operations.
Innovation Solution
A data transmission circuit is introduced, comprising a normal reading module, a redundant reading module, and an error detection operation module, which allows for parallel data reading from both normal and redundant storage arrays, eliminating the need for serial querying of damaged arrays and simplifying the data reading process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If serial querying and replacement process is used when normal storage array is damaged, then reliability is improved through error detection and correction, but processing speed deteriorates due to increased time required for error detection and correction
Solution Approach 1:
The patent applies preliminary action by pre-organizing redundant storage arrays and establishing ready-to-use replacement pathways before damage occurs. When a normal storage array is damaged, the system can immediately switch to pre-configured redundant arrays without performing serial querying, thus maintaining both reliability through error correction and speed by eliminating the query delay
Solution Approach 2:
The patent implements dynamics by creating a dynamic switching mechanism between normal and redundant storage arrays. The system can adaptively transition from normal arrays to redundant arrays based on damage detection, enabling parallel data reading operations that maintain processing speed while ensuring reliability through the availability of backup arrays
2Measurement precision
If serial querying of damaged arrays is performed, then accurate error detection is achieved, but reading speed deteriorates due to sequential processing requirements
Solution Approach 1:
The patent applies preliminary action by pre-establishing the relationship between normal and redundant storage arrays before damage occurs. This pre-configuration allows the system to directly access appropriate redundant arrays without serial querying, maintaining error detection accuracy through pre-defined replacement mappings while significantly improving reading speed by eliminating sequential processing
Solution Approach 2:
The patent uses copying by creating redundant copies of storage array data and maintaining parallel reading capabilities. Instead of serially querying damaged arrays, the system can immediately access copied data from redundant arrays, ensuring accurate error detection through comparison while achieving parallel processing speeds
3Reliability
If redundant storage arrays are used for replacement, then reliability is improved through backup capability, but device complexity increases due to additional reading modules and error detection operations
Solution Approach 1:
The patent applies universality by designing redundant reading modules that can serve multiple functions: reading from redundant arrays, performing error detection, and enabling parallel data processing. This multi-functionality reduces the need for separate dedicated components for each function, thereby improving reliability through backup capability while minimizing the increase in device complexity
Solution Approach 2:
The patent merges the error detection operation module with the redundant reading module, combining what could be separate functions into an integrated unit. This merging reduces the overall number of independent components in the system, achieving reliable backup capability while keeping the structural complexity increase minimal through functional integration
Data Source
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AI summary
Provided are a data transmission circuit and a memory. The data transmission circuit includes: a normal reading module, which is connected to a normal storage array and configured to read and output data from the normal storage array; a redundant reading module, which is connected to a redundant storage array, and configured to read and output data from the redundant storage array; and an error detection operation module, which is connected to the normal reading module and the redundant reading module respectively, and configured to synchronously receive the read data output from the normal reading module and the redundant reading module, and perform error detection operation on the read data.