Data-Value Branch Prediction for Reconfigurable Hardware Execution

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing processing architectures face challenges in predicting the execution order of computer instructions, particularly when branch instructions are involved, leading to pipeline flushes and reduced performance due to incorrect predictions and hardware limitations in branch prediction methods.

Innovation Solution

The proposed solution involves identifying likely data values based on program data values to predict the execution order of computer instructions, generating anticipated instructions, and restoring the processing circuitry to an initial state upon failed predictions, allowing for the execution of alternative instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If branch prediction methods are used to predict execution order, then processing speed is improved, but hardware complexity increases and prediction accuracy is limited

Engineering Contradiction:
Improveprocessing speedVSAvoidhardware complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent creates a copy of the instruction set with predicted execution order based on data value analysis. Instead of complex hardware branch prediction, the system generates an anticipated instruction set that copies the logic flow but orders instructions based on predicted data values, reducing hardware complexity while maintaining speed

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system performs preliminary analysis of data values before instruction execution to predict execution order. By pre-determining the likely execution path based on data sampling and value prediction, the system prepares the anticipated instruction set in advance, avoiding the need for complex runtime branch prediction hardware

Inventive Principle:
Principle #10Preliminary action

2Productivity

If traditional branch prediction is used, then some prediction capability is provided, but pipeline flushes occur reducing throughput

Engineering Contradiction:
ImprovethroughputVSAvoidpipeline flush time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system implements feedback by sampling actual data values during execution and comparing them with predicted values. This feedback mechanism allows the system to learn from actual execution patterns and improve future predictions, reducing pipeline flushes over time while maintaining high throughput

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameter used for prediction from traditional program counter-based methods to data value-based prediction. By analyzing actual data values and their likely values, the system dynamically adjusts execution order predictions, minimizing incorrect predictions and pipeline flushes, thereby maintaining high throughput

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If data sampling is performed to identify likely data values, then prediction accuracy is improved, but processing overhead increases

Engineering Contradiction:
Improveprediction accuracyVSAvoidprocessing overhead
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The system performs partial data sampling rather than analyzing all data values. By sampling a representative subset of data values and using statistical analysis to identify likely values, the system achieves good prediction accuracy without the excessive processing overhead of complete data analysis

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12493471B2Optimizing execution of code on reconfigurable hardware using likely data values based on data sampling
Publication Date: 2025.12.09 NEXTSILICON LTD
  • US12493471B2 patent drawing
  • US12493471B2 patent drawing
  • US12493471B2 patent drawing

AI summary

An apparatus for computing, comprising a processing circuitry configured for computing an outcome of executing a set of computer instructions comprising a group of data variables, by: identifying an initial state of the processing circuitry; executing a set of anticipated computer instructions produced based on the set of computer instructions and a likely data value, where the likely data value is a value of one the group of data variables anticipated to be computed by executing the set of computer instructions and computed using at least one program data value; and when identifying, while executing the set of anticipated computer instructions, a failed prediction where the data variable is not equal to the likely data value: restoring the initial state of the processing circuitry; and executing a set of alternative computer instructions, produced based on the set of computer instructions and the at least one likely data value.