Fine-Grained Packet Formation in Data Vortex Computing

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Solution Overview

Problem

In distributed computing systems, performing sparse matrix vector multiplication can lead to network congestion due to the need to transfer large data sets among processors, especially when matrices and vectors exceed system memory capacity, causing inefficiencies in data handling and processing times.

Innovation Solution

The implementation of a data vortex computing system with enhanced network interface controllers (NICs) and vortex registers that enable fine-grained parallel processing by forming packets without storing payloads or headers in memory, reducing latency and increasing the number of logical operations that can be performed without processor intervention, and utilizing multiple channels for non-blocking operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If large matrices and vectors are distributed across multiple processors, then the system can handle data exceeding memory capacity, but network congestion increases due to frequent data transfers

Engineering Contradiction:
Improvedata processing capacityVSAvoidnetwork efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments data transfers into fine-grained packets at the network interface controller level, allowing multiple small packets to be transmitted in parallel across different network channels. This segmentation enables efficient handling of large distributed matrices by breaking down bulk transfers into manageable units that can be routed independently, reducing network congestion while maintaining high data processing capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces fine-grained parallelism at the network interface controller dimension, enabling simultaneous transmission of multiple packets across different network channels. This adds a temporal and spatial dimension to data transfers, allowing the system to handle large distributed data sets without proportionally increasing network congestion

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If processors communicate at full cache line granularity, then data transfer efficiency is improved, but flexibility in handling fine-grained data operations is reduced

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoiddata operation flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic packet formation at the network interface controller, allowing the system to adaptively create packets of appropriate sizes based on the specific data operation requirements. This dynamic approach enables the system to switch between fine-grained transfers for flexibility and larger transfers for efficiency, depending on the operational context

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the granularity parameter of data transfers from fixed cache line sizes to variable packet sizes determined by the network interface controller. This parameter change allows the system to optimize transfer efficiency for each specific operation while maintaining the flexibility to handle diverse data access patterns

Inventive Principle:
Principle #35Parameter changes

3Reliability

If data is stored in memory before processing, then data availability is ensured, but processing latency increases due to memory access times

Engineering Contradiction:
Improvedata availabilityVSAvoidprocessing latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary packet formation and data preparation at the network interface controller before data enters the main processing pipeline. By pre-processing data into appropriately formatted packets and preparing transfer sequences in advance, the system reduces latency during actual processing while ensuring data availability through proper buffering

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces the network interface controller as an intermediary between memory and processors, performing data preparation, packet formation, and transfer management. This intermediary layer offloads processing tasks from the main CPU pipeline, reducing latency while maintaining reliable data availability through coordinated memory access

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9930117B2Matrix vector multiply techniques
Publication Date: 2018.03.27 INTERACTIC HOLDINGS LLC
  • US9930117B2 patent drawing
  • US9930117B2 patent drawing
  • US9930117B2 patent drawing

AI summary

Techniques are disclosed relating to parallel computing. In some embodiments, fine-grained data communication facilitates operations on large data sets such as multiplication of a sparse matrix by a vector. In this example, a first data set (the matrix) and a second data set (the vector) are distributed across multiple processing nodes. Performance of the overall multiplication operation may require communication of data among the processing nodes. In various embodiments, fine-grained communication of this data may reduce processing times and/or power consumption by avoiding congestion.