Database-Driven Place and Route for Coarse-Grain Reconfigurable Architectures

Resolve Bottlenecks,
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Solution Overview

Problem

Current CGRA compilers face challenges in reducing compile time and achieving efficient dataflow execution due to the complexity of placing and routing operations on configurable units, particularly in coarse-grain reconfigurable architectures.

Innovation Solution

A database-driven place and route system that utilizes empirically validated reference graphs and their placements to classify unplaced unit graphs using a graph neural network, assigning placement positions based on matching reference graphs, and using an ab-initio placer for remaining units to efficiently place operations on configurable units arrays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional ab-initio place and route methods are used for CGRA compilers, then placement and routing can be performed, but compile time is excessive and efficiency is low

Engineering Contradiction:
Improvecompile timeVSAvoidcomplexity of placing and routing operations
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses a database of previously solved placement-routing problems and their solutions. When a new placement-routing problem arises, the system searches for similar problems in the database and copies their solutions, thereby avoiding redundant computation and significantly reducing compile time while maintaining placement quality

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system performs preliminary actions by pre-computing and storing solutions to common placement-routing problems in a database. This allows future similar problems to be solved quickly by retrieval rather than recomputation, addressing the time complexity issue

Inventive Principle:
Principle #10Preliminary action

2Productivity

If coarse-grain reconfigurable architecture is used, then dataflow execution efficiency can be improved, but the complexity of the compiler increases

Engineering Contradiction:
Improvedataflow execution efficiencyVSAvoidcompiler complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies copying by retrieving pre-computed placement-routing solutions from a database for CGRA compilers. This allows the compiler to maintain high dataflow execution efficiency through sophisticated placement-routing algorithms while reducing its own complexity by reusing proven solutions rather than recomputing them for each case

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20240220698A1Database driven place and route for coarse-grain reconfigurable architectures
Publication Date: 2024.07.04 SAMBANOVA SYSTEMS INC
  • US20240220698A1 patent drawing
  • US20240220698A1 patent drawing
  • US20240220698A1 patent drawing

AI summary

This application provides an example method, an example system, and an example non-transitory computer-readable medium for database driven place and route. One example method includes receiving an unplaced unit graph. The example method also includes classifying the unplaced unit graph against a database of previously placed reference unit graphs using a graph neural network (GNN) to identify a nearest matching previously placed reference unit graph of the database. The example method further includes placing configurable units of the unplaced unit graph onto positions in a configurable units array based on placement position attributes of at least a portion of configurable units of the nearest matching previously placed reference unit graph. The example method also includes generating configuration data that enables the configurable units array to execute at least a portion of the unplaced unit graph.