Dataflow Gasket Interconnects for High-Traffic IC Data Streams

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Solution Overview

Problem

Existing ICs face inefficiencies in data transfer between circuit blocks due to standard bussing stalling during high traffic periods and point-to-point bussing causing unnecessary area and power overhead, especially in heterogeneous complex chips with varying data traffic types.

Innovation Solution

Implementing a network of dataflow gaskets with tightly coupled memories and configurable stream registers to facilitate efficient data movement between circuit blocks, allowing for customizable interconnect topologies based on traffic patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If standard bussing is used for interconnecting circuit blocks, then overall throughput is improved, but the system stalls during high traffic periods when slower systems absorb traffic

Engineering Contradiction:

Improveoverall throughputVSAvoidstalling time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent segments the data transfer process into independent dataflow streams that can be handled separately. Each stream is processed independently through the interconnect network, allowing parallel handling of multiple data transfers without mutual interference, thus preventing stalling during high traffic periods.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces dataflow gaskets as intermediary components that buffer and regulate data streams between circuit blocks. These gaskets absorb traffic variations and smooth out peaks, preventing stalling while maintaining overall throughput by acting as mediators in the data transfer process.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If point-to-point bussing is used to connect each compute block to every other compute block, then any arbitrary data traffic is supported, but unnecessary area and power overhead is incurred

Engineering Contradiction:

Improvearbitrary data traffic supportVSAvoidinterconnect area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent implements a universal interconnect network where dataflow gaskets and streaming processors can handle multiple types of data traffic patterns (memory, peripheral, computation) through a single standardized interface. This eliminates the need for dedicated point-to-point connections while maintaining support for arbitrary data traffic between circuit blocks.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs dynamically configurable dataflow gaskets that can adapt their connection patterns and routing based on actual traffic requirements. This dynamic reconfiguration allows the system to support arbitrary data traffic when needed while minimizing interconnect usage during periods of lower complexity traffic, reducing area and power overhead.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If point-to-point bussing is used to connect each compute block to every other compute block, then any arbitrary data traffic is supported, but unnecessary power overhead is incurred

Engineering Contradiction:

Improvearbitrary data traffic supportVSAvoidinterconnect power consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent extracts the intelligence and control logic from the interconnect fabric itself and places it in the dataflow gaskets and streaming processors. This allows the interconnect network to remain simple and low-power, while complex routing and traffic management functions are performed by active components that only consume power when actually processing data.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS12530308B2Dataflow gaskets for handling data streams

Publication Date: 2026.01.20 ANALOG DEVICES INC

AI summary

Apparatus and methods for facilitating data movement among circuit blocks are disclosed. In certain embodiments, an integrated circuit (IC) includes a network of dataflow gaskets including a first dataflow gasket coupled to a first circuit block and a second dataflow gasket coupled to a second circuit block. The first circuit block can write to the second circuit block by programming output stream registers of the first dataflow gasket for an outgoing write stream that includes a header identifying the second dataflow gasket. The header can be provided by the first dataflow gasket to the second dataflow gasket over the network, and in response to the header reaching the second dataflow gasket, the second dataflow gasket can program the input stream registers of the second dataflow gasket for an incoming read stream.