Dynamic Bandwidth Allocation Processor Architecture

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current CPU solutions for Dynamic Bandwidth Allocation (DBA) processing in communication networks are limited by high response times and computation overhead, while hardware-based solutions lack flexibility to adapt to evolving network traffic patterns.

Innovation Solution

A DBA processor system that combines a CPU core with dedicated hardware extensions, including a co-processor for accelerating DBA calculations, which includes units for queue status querying, bandwidth allocation, and monitoring, connected through various buses to enhance processing efficiency and flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If off-the-shelf CPUs are used for DBA processing, then flexibility is maintained, but response time increases and processing speed decreases

Engineering Contradiction:
ImproveflexibilityVSAvoidresponse time
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The system is divided into two segments: a CPU core that handles flexible control and configuration, and a dedicated hardware acceleration unit that performs computationally intensive DBA calculations. This segmentation allows each component to specialize in its strength while working together as an integrated system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A co-processor interface acts as an intermediary between the CPU core and the hardware acceleration unit. This intermediary enables efficient communication and coordination, allowing the flexible CPU to control the specialized hardware without sacrificing either flexibility or speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If dedicated hardware solutions are used for DBA processing, then processing speed increases, but flexibility to adapt to changing algorithms decreases

Engineering Contradiction:
Improveprocessing speedVSAvoidflexibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The hardware acceleration unit is designed with dynamic reconfigurability, allowing it to adapt to different DBA algorithms and traffic patterns. The system can dynamically adjust its processing capabilities based on network conditions while maintaining high processing speed through hardware-level optimization.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If standard CPUs are used, then system flexibility is maintained, but computation time increases

Engineering Contradiction:
Improvesystem flexibilityVSAvoidcomputation time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system replaces pure software-based CPU processing with a hybrid architecture that uses hardware circuits for specific DBA computation tasks. This substitution of mechanical/software operations with hardware operations dramatically reduces computation time while the CPU core maintains overall system flexibility through configuration and control capabilities.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7933276B2Dynamic bandwidth allocation processor
Publication Date: 2011.04.26 MICROSEMI ISRAEL STORAGE SOLUTIONS LTD
  • US7933276B2 patent drawing
  • US7933276B2 patent drawing
  • US7933276B2 patent drawing

AI summary

A dynamic bandwidth allocation (DBA) processor comprises a DBA co-processor having DBA co-processor components and operative to perform and accelerate DBA functions, and a processing core logically coupled to the DBA co-processor through a processing bus and operative to configure and dynamically control all the DBA co-processor components and to run sections of algorithms that cannot be accelerated on the DBA co-processor. The DBA processor significantly accelerated the bandwidth allocation in a communications network such as an optical communications network or a fast wireless network. The DBA co-processor and the processing core may be integrated on a chip.