DBC Substrate Package with 3D Component Embedding
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Solution Overview
Problem
Conventional housing package structures for power modules restrict electronic component integration due to 2D mounting, leading to high line impedance, parasitic effects, and limited applications, as they do not allow for efficient heat dissipation and voltage handling in a modularized electronic device context.
Innovation Solution
A package structure with a direct bond copper (DBC) substrate partially embedded within an insulation layer, utilizing conductive vias and multiple conductive layers for enhanced electrical connectivity and heat dissipation, allowing for 3D integration of electronic components and reduced parasitic effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If electronic components are mounted on the same layer of the DBC substrate in a 2D configuration, then the manufacturing process is simple, but the line impedance is high and parasitic effects are easily generated
Solution Approach 1:
The patent transitions from 2D planar mounting to 3D立体 integration by embedding electronic components at different depths within the insulation layer. The DBC substrate is partially embedded in the insulation layer, allowing components to be positioned at multiple vertical levels, thereby reducing trace lengths and parasitic effects while maintaining manufacturing feasibility through standardized embedding processes
2Device complexity
If electronic components are arranged on the same layer of the DBC substrate, then the layout is simple, but the traces between components are long and line impedance is high
Solution Approach 1:
The invention introduces vertical dimensionality by positioning electronic components at different depths within the insulation layer. This 3D arrangement significantly shortens the horizontal distance between components and their connection points on the DBC substrate, reducing trace lengths and associated parasitic inductance and resistance, thereby improving electrical performance without substantially increasing layout complexity
3Temperature
If the conventional housing package structure is used, then the heat dissipation is adequate, but the power density is limited and applications are restricted
Solution Approach 1:
The patent employs 3D integration architecture that enables better thermal management by distributing heat-generating components across multiple vertical layers. This allows for more efficient heat dissipation paths and higher power density, making the package suitable for advanced applications such as electric vehicles and renewable energy systems that require both high power handling and compact form factor
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances electrical properties, reduces parasitic effects, and increases heat dissipation efficacy, enabling higher power density and wider application in modular electronic devices by allowing for efficient 3D integration and surface mount technology usage.
Implementation Method 1
a direct bond copper (DBC) substrate that has good heat-dissipating efficacy
Implementation Method 2
utilizing conductive vias and multiple conductive layers for enhanced electrical connectivity
Data Source
AI summary
A package structure includes a first insulation layer, a first conductive layer, a direct bond copper substrate, and a first electronic component. A first conductive via is formed in the first insulation layer. The first conductive layer is disposed on a top surface of the first insulation layer and in contact with the first conductive via. The direct bond copper substrate includes a second conductive layer, a third conductive layer and a ceramic base. The ceramic base is disposed on a bottom surface of the first insulation layer and exposed to the first insulation layer by press-fit operation. The first electronic component is embedded within the first insulation layer and disposed on the second conductive layer. The first electronic component includes a first conducting terminal. The first conducting terminal is electrically connected with the second conductive layer and/or electrically connected with the first conductive layer through the first conductive via.