DBI Signal Generation Circuit for Low-Current Memory Data Transfer
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Solution Overview
Problem
Existing semiconductor memory apparatuses face issues with high current consumption and data transfer errors due to short circuit currents and transistor resistance skew when generating DBI signals, which can lead to system operation errors.
Innovation Solution
A semiconductor memory apparatus that includes a data switching detection unit to compare previous and current data and output detection signals, and a DBI detection unit that generates a DBI signal based on charge sharing levels between capacitive elements, minimizing the risk of short circuit currents and errors by charging and discharging these elements according to control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the outputs of the inverters are connected to the same node to generate DBI signal, then the DBI signal can be generated by comparing previous and current data, but a short circuit current is generated causing increased current consumption
Solution Approach 1:
The patent divides the inverter outputs into separate nodes instead of connecting them to the same node. Each inverter output is independently connected to its own node, preventing short circuit currents while still enabling DBI signal generation through separate comparison paths.
Solution Approach 2:
The patent introduces an additional logic circuit as an intermediary between the inverter outputs and the DBI signal generation. This intermediary circuit processes the separate inverter outputs without requiring them to share a common node, thereby eliminating short circuit currents while maintaining the DBI functionality.
2Reliability
If the outputs of the inverters are connected to the same node to generate DBI signal, then the DBI signal can be generated by comparing previous and current data, but errors occur in DBI signal generation due to resistance skew of transistors
Solution Approach 1:
The patent segments the DBI signal generation into separate independent paths, with each inverter output processed through its own dedicated logic circuit. This segmentation eliminates the resistance skew problem by removing the common node that causes unequal voltage drops, thereby improving measurement precision and signal accuracy.
Solution Approach 2:
The additional logic circuit acts as an intermediary that processes each inverter output independently without the interference of transistor resistance skew. This intermediary structure ensures accurate DBI signal generation by preventing the voltage differences caused by resistance variations from affecting the comparison result.
3Measurement precision
If inverters with multiple transistor configurations are used to detect data changes, then data switching can be detected accurately, but short circuit currents are generated connecting outputs to the same node
Solution Approach 1:
The patent segments the detection outputs into separate nodes, allowing each inverter configuration to operate independently without creating short circuits. This maintains the ability to accurately detect data switching while eliminating the harmful short circuit current that would otherwise be generated by connecting outputs to a common node.
Solution Approach 2:
The additional logic circuit serves as an intermediary that collects and processes signals from multiple independent inverter outputs without requiring them to share a common node. This intermediary structure preserves detection accuracy while preventing short circuit currents from generating harmful effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces current consumption and prevents errors in DBI signal generation, enhancing the reliability of semiconductor memory systems by avoiding short circuit currents and transistor resistance-related issues.
Implementation Method 1
a DBI detection unit that outputs a DBI signal according to a difference in charge sharing level using the detection signal
Data Source
AI summary
An apparatus for generating a DBI signal in a semiconductor memory apparatus includes a data switching detection unit that detects whether or not previous data is consistent with current data and outputs a detection signal according to a detection result, and a DBI detection unit that outputs a DBI signal according to a difference in charge sharing level using the detection signal. Therefore, it is possible to minimize current consumption. Further, since there is no effect due to resistance skew of a transistor, an error in DBI signal generation and an error in data transfer accordingly can be prevented. Therefore, it is possible to improve the reliability of a system to which a semiconductor memory apparatus is applied.