DC-Coupled High-Voltage Level Shifter Edge Delay

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Solution Overview

Problem

High voltage semiconductor devices controlled by low breakdown voltage transistors face limitations due to poor figure of merit (FOM) of traditional high voltage transistors, leading to reduced operating frequencies and inefficiencies in power management applications, such as power management and audio amplifiers, where high side and low side control circuits require efficiency, low distortion, high speed, flexibility, and reliability.

Innovation Solution

A timing control circuit using configurable edge delay circuits in series connection to selectively delay rising and falling edges of an input square wave signal, allowing for independent control of high side and low side devices in a high voltage domain using low voltage transistors, with a parallel resistive-capacitive coupling to transmit both edge and DC level information, enabling robust and efficient control of high voltage devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional high voltage transistors are used in control circuits, then high voltage devices can be controlled, but the figure of merit is poor and operating frequencies are limited

Engineering Contradiction:
Improvecontrol capabilityVSAvoidoperating frequency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a level shifter circuit as an intermediary component between low voltage control signals and high voltage devices. The level shifter translates low voltage control signals to high voltage signals that can drive the power devices, allowing low voltage transistors with high FOM to control high voltage devices without being directly exposed to high voltage stress.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The control system is divided into separate voltage domains: a low voltage control domain using high FOM transistors for signal processing, and a high voltage power domain for device operation. This segmentation allows each domain to use optimized components - low voltage transistors for control and high voltage devices for power handling - thereby achieving both reliability and high operating frequency.

Inventive Principle:
Principle #1Segmentation

2Reliability

If high side and low side control circuits are used, then high voltage devices can be controlled, but timing overlap occurs reducing efficiency

Engineering Contradiction:
Improvecontrol functionalityVSAvoidefficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The level shifter circuit incorporates feedback mechanisms that monitor the state of high side and low side devices and adjust timing accordingly. This feedback ensures proper dead-time insertion between switching events, preventing overlap conduction and the associated energy losses while maintaining reliable control of both device sides.

Inventive Principle:
Principle #23Feedback

3Productivity

If low breakdown voltage transistors are used to control high voltage devices, then cost and performance improve, but voltage handling capability is insufficient

Engineering Contradiction:
ImproveperformanceVSAvoidvoltage breakdown
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The level shifter acts as a protective intermediary that isolates low breakdown voltage transistors from high voltage conditions. The circuit architecture ensures that low voltage transistors only handle control signals within their safe operating range, while the level shifter handles the voltage translation to the high voltage domain, thus protecting the transistors from breakdown while enabling high performance control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for efficient control of high voltage devices using low breakdown voltage transistors, improving performance and cost by enabling proper timing control and reducing overlap times, thus enhancing the reliability and efficiency of high voltage applications like DC/DC converters and class-D audio amplifiers.

Implementation Method 1

parallel resistive-capacitive coupling to transmit both edge and DC level information

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

parallel resistive-capacitive coupling to transmit both edge and DC level information

Methodology Applied
Scientific EffectResistive coupling: Electrical Resistance

Implementation Method 3

the edge delay is based on a charging time of one capacitor by a current source to reach a trip point voltage of an inverter

Methodology Applied
Scientific EffectRC charging time delay: Capacitance

Data Source

PatentUS11658654B2DC-coupled high-voltage level shifter
Publication Date: 2023.05.23 MURATA MFG CO LTD
  • US11658654B2 patent drawing
  • US11658654B2 patent drawing
  • US11658654B2 patent drawing

AI summary

Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.