DC-DC Converter Burst Mode Ripple Reduction
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Solution Overview
Problem
DC-DC converters with burst mode functions in display devices cause screen shaking due to ripple effects in driving voltages, especially at low loads, leading to degraded display quality and increased power consumption.
Innovation Solution
Implementing a DC-DC converter with a burst mode circuit for light loads and a PWM mode circuit for heavy loads, where the burst mode circuit switches voltage based on frequency division values and the PWM mode circuit switches voltage based on a ramp wave signal, to minimize ripple effects and reduce standby power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If burst mode is used to reduce standby power consumption, then power efficiency is improved, but display quality deteriorates due to screen shaking from voltage ripples
Solution Approach 1:
The patent dynamically switches between burst mode and PWM mode based on load conditions. During light load periods, burst mode is activated to reduce power consumption. During heavy load periods, PWM mode is activated to maintain stable voltage output and prevent screen shaking. This dynamic adaptation resolves the contradiction by optimizing the operating mode according to real-time conditions.
Solution Approach 2:
The patent changes the operating parameter (mode of operation) based on load conditions. When load exceeds a threshold, the system transitions from burst mode to PWM mode, effectively changing the voltage switching strategy to eliminate ripples and screen shaking while maintaining power efficiency benefits during light loads.
2Power
If burst mode switches voltage continuously to maintain output, then power delivery is maintained, but ripple effects increase causing visible screen shaking
Solution Approach 1:
The system dynamically adjusts the switching strategy based on load demands. During light loads, burst mode provides intermittent power delivery to save energy. During heavy loads, PWM mode provides continuous stable power delivery. This dynamic adjustment ensures both power delivery requirements and voltage stability are met under different operating conditions.
Solution Approach 2:
The patent employs feedback mechanisms to monitor voltage output and load conditions. When voltage ripples exceed acceptable thresholds or load increases, the system receives feedback and switches from burst mode to PWM mode, thereby maintaining voltage stability and eliminating screen shaking while preserving power efficiency during light loads.
3Object-affected harmful factors
If PWM mode is used for stable voltage output, then display quality is maintained, but standby power consumption increases
Solution Approach 1:
The patent segments the operating conditions into light load and heavy load scenarios, applying different voltage switching strategies to each segment. During light load periods, burst mode is used to minimize power consumption. During heavy load periods, PWM mode is used to ensure display quality. This segmentation allows the system to optimize for power efficiency when possible and for quality when necessary.
Solution Approach 2:
The system changes the operating parameter (switching mode) based on load conditions. When load is light, the parameter is set to burst mode for power efficiency. When load is heavy, the parameter switches to PWM mode for stable output. This parameter change strategy resolves the contradiction by applying the appropriate mode for each operating condition.
Data Source
AI summary
A DC-DC converter comprises a burst mode circuit configured to work when a load connected to an output terminal of the DC-DC converter is a light load, and a PWM mode circuit configured to work when the load is a heavy load, wherein the burst mode circuit switches a voltage at the output terminal during a period of time when a feedback voltage from the output terminal reaches a high potential reference voltage, generates a switch start signal with frequencies divided by predetermined frequency division values, and switches the voltage at the output terminal in response to the switch start signal, and wherein the PWM mode circuit switches the voltage at the output terminal during a period of time when a ramp wave signal is greater than a difference voltage between the feedback voltage and a predetermined PWM mode reference voltage.