DC-DC Converter Dual Path Error Correction
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Solution Overview
Problem
DC-DC converters face challenges in stabilizing negative feedback loops due to the presence of inductors and shunt capacitors, leading to difficulties in maintaining a constant power supply voltage as battery voltage decreases, and existing solutions consume large semiconductor areas and increase power consumption.
Innovation Solution
A DC-DC converter design with two circuit paths that can switch between error correction and normal operating modes, using voltage comparators and integrating filters to adapt the load voltage to a reference voltage, allowing for error cancellation without constraining switch states and reducing transient perturbations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If high valued resistors are used to limit current in CMOS comparators, then current control is achieved, but semiconductor area increases and power consumption increases
Solution Approach 1:
The patent changes the parameter of current limiting from using high valued resistors to using switches operated at a fixed frequency. This parameter change eliminates the need for large area resistors while controlling power consumption through frequency-based switching operation.
Solution Approach 2:
The patent substitutes the mechanical/resistive current limiting approach with an electronic switching approach. Instead of using resistors to passively limit current, the invention uses active switches controlled by timing signals to regulate current flow, thereby reducing both area and power consumption.
2Reliability
If two series connected comparators are used to stabilize the feedback loop, then loop stability is improved, but device complexity increases
Solution Approach 1:
The patent segments the feedback control function into two distinct comparators with separate functions: the first comparator generates current output based on load voltage error, and the second comparator controls switch duty cycle. This segmentation stabilizes the feedback loop while organizing complexity into manageable functional blocks.
Solution Approach 2:
The patent introduces an intermediary current output stage between the voltage error detection and the duty cycle control. The first comparator produces a current output that serves as an intermediate signal, which is then processed by the second comparator to control the switches, thereby stabilizing the feedback loop through this intermediate current stage.
3Power
If switches are operated at fixed frequency to alternate connecting the inductor, then power supply voltage regulation is achieved, but transient perturbations increase
Solution Approach 1:
The patent implements a negative feedback loop that monitors load voltage and adjusts the duty cycle of the switches accordingly. The feedback mechanism compares the actual load voltage with a reference voltage and modifies the switch operation to eliminate voltage errors, thereby achieving regulation while minimizing transient perturbations through continuous correction.
Solution Approach 2:
The patent transitions from fixed-frequency switching to dynamic duty cycle control. While switches operate at a fixed frequency, the duty cycle is dynamically adjusted based on feedback from the load voltage. This dynamic adjustment allows the system to maintain power regulation while adapting to transient conditions, thereby reducing transient perturbations.
Data Source
AI summary
A DC-DC converter and method for compensating for errors in the DC-DC converter. The DC-DC converter includes an inductor coupled for receiving a source of operating voltage through a plurality of switches. The switches are controlled by a control circuit that has first and second circuit paths that are substantially parallel to each other. Each circuit path is comprised of two switched capacitor comparators that are connected in series. The circuit paths function such that during one portion of a clock period one of the circuit paths operates in an error correction mode and the other circuit path operates in a normal mode. During a different portion of the clock period the operational modes of the circuit paths switch. This allows for a calibration interval in a sampled system in which at least one circuit path is always active and responsive to the input signals in a desired manner.