DC-DC Converter Circuit with Dual Feedback Offset Compensation
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Solution Overview
Problem
DC-DC converters experience efficiency degradation at high switching frequencies, especially under light load conditions, which negatively impacts battery lifetime in mobile devices, and existing solutions like pulse-frequency modulation (PFM) control schemes have limitations in addressing output regulation offsets and system complexity.
Innovation Solution
A closed-loop solution is implemented in the DC-DC converter circuit, using a feedback loop to compensate output offsets due to PVT variations, aging, and component de-rating, with minimal impact on current consumption and system complexity, allowing operation with various PFM modes such as ripple-based, hysteretic, and Constant-On-Time (COT) modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If pulse-frequency modulation (PFM) control schemes are used to address efficiency degradation at high switching frequencies, then efficiency under light load conditions is improved, but output regulation offsets due to PVT variations, aging, and component de-rating are not compensated
Solution Approach 1:
The patent introduces a closed-loop feedback mechanism that continuously monitors the output voltage and adjusts the switching control signals to compensate for output offsets. The feedback loop compares the actual output voltage with the desired setpoint and generates error signals that are used to adjust the switching duty cycle, thereby maintaining accurate output regulation despite PVT variations, aging, and component de-rating while preserving the efficiency benefits of PFM operation
2Device complexity
If conventional DC-DC converter designs are used, then system complexity and occupied semiconductor area are minimized, but output offset compensation capability is lacking
Solution Approach 1:
The patent merges the offset compensation function with the existing feedback control structure by integrating additional control circuitry that works in conjunction with the primary regulation loop. This approach allows the system to gain output offset compensation capability while reusing existing components and minimizing additional semiconductor area, as the compensation mechanism is combined with rather than separate from the main control architecture
Data Source
AI summary
A converter circuit includes first and second electronic switches coupled at an intermediate node, with an inductor coupled between the intermediate node and an output node. Switching drive control circuitry causes the first and the second electronic switch to switch between a conductive state and a non-conductive state. The drive control circuitry includes a first feedback signal path to control switching of the first and the second electronic switch as a function of the difference between a feedback signal indicative of the signal at the output node and a reference value. A second feedback signal path includes a low-pass filter coupled to the output node and configured to provide a low-pass filtered feedback signal resulting from low-pass filtering of the output signal. The second feedback signal path compensates the feedback signal as a function of the difference between the low-pass filtered feedback signal and a respective reference value.