DC-DC Converter Gate Driving Circuit Without External Diodes

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Solution Overview

Problem

Existing DC-DC converters using N-type FETs in main switching devices require external diodes for gate driving, leading to power loss and efficiency reduction due to forward electromotive force, and the process for integrating Schottky diodes is complex.

Innovation Solution

A DC-DC converter design that employs a main NMOS transistor with a driver and a first capacitance connected between its source terminal and the driver's power source terminal, along with a first switching device that is non-conductive during the transistor's conduction phase and conductive during its non-conduction phase, eliminating the need for external diodes by preventing counter-flow and reducing forward direction electromotive force.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a Schottky diode is used in the charge pump circuit for gate driving, then the gate driving function is achieved, but the forward electromotive force causes power loss and efficiency reduction

Engineering Contradiction:
Improvegate driving functionVSAvoidpower loss from forward electromotive force
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts and removes the Schottky diode from the charge pump circuit. By eliminating the diode component entirely, the forward electromotive force loss is eliminated. The charge pump circuit is redesigned to use only transistors (Q1, Q2) and capacitors (C1, C2) to achieve the gate driving function without any diode-based voltage drops.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The transistors in the charge pump circuit serve multiple functions: they act as switches for charge transfer, voltage amplification elements, and replacement for the diode's rectification function. This multi-functionality eliminates the need for separate diode components and their associated power losses.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If a Schottky diode is integrated into the LSI device, then the gate driving function is achieved, but the integration process becomes complex

Engineering Contradiction:
Improvegate driving capabilityVSAvoidintegration process complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent merges the charge pump circuit completely into the LSI device using only standard transistor and capacitor components that are native to CMOS fabrication. By combining all necessary functions into a unified circuit using conventional components, the integration process becomes simpler and more compatible with standard LSI manufacturing processes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the component parameters and types used in the charge pump circuit - specifically replacing diode-based implementations with transistor-based implementations. This parameter change (from diode to transistor) simplifies the integration process by using components that are more easily fabricated using standard CMOS processes.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If an N-type FET is used as the main switching device, then conduction resistance is decreased and efficiency is improved, but the gate driving voltage must be higher than the input voltage

Engineering Contradiction:
Improveconduction resistance lossVSAvoidgate driving voltage requirement
Core Design Contradiction:
Loss of energyVSPower

Solution Approach 1:

The charge pump circuit performs preliminary action by pre-charging capacitors C1 and C2 to voltages higher than the input voltage V_IN before the main switching device needs to conduct. This stored high voltage is then used to drive the gate of the N-type FET, enabling it to conduct with low resistance without requiring real-time high voltage generation during switching.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces capacitors C1 and C2 as intermediary energy storage elements between the charge pump circuit and the gate of the main switching device. These capacitors mediate the voltage transformation, storing energy at high voltage and delivering it to the gate, thereby decoupling the input voltage from the required gate driving voltage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances conversion efficiency by minimizing power waste from forward direction electromotive force and simplifies integration within LSI devices compared to using Schottky diodes, while maintaining effective charge voltage levels.

Implementation Method 1

a first capacitance connected between a source terminal of the main NMOS transistor and a power source terminal of the driver

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a first switching device connected between a path to reach an input power source and the power source terminal of the driver; wherein the first switching device is made non-conductive when the main NMOS transistor is conductive, and the first switching device is made conductive when the main NMOS transistor is non-conductive

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS7656143B2DC-DC converter
Publication Date: 2010.02.02 INFINEON TECHNOLOGIES AMERICAS CORP
  • US7656143B2 patent drawing
  • US7656143B2 patent drawing
  • US7656143B2 patent drawing

AI summary

To present a DC-DC converter efficient in conversion and not requiring an external diode. The DC-DC converter includes a main NMOS transistor FET1 as a main switching device, a driver DVH1 for driving a gate terminal of the main NMOS transistor FET1, a capacitor C2 connected between a source terminal of the main NMOS transistor FET1 and a power source terminal of the driver DVH1, and an NMOS transistor FET3 connected between a route leading to an input power source and the power source terminal of the driver DVH1. The NMOS transistor FET3 does not conduct when the main NMOS transistor FET1 conducts, and conducts when the main NMOS transistor FET1 does not conduct.