DC-DC Converter Level Shifter Clock Skew Charge Sharing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Clock skew and charge-sharing problems in DC-DC converters for display panels lead to performance degradation due to loading effects, causing distorted clock signals and inefficiencies in charge pumping.
Innovation Solution
A DC-DC converter design incorporating a negative voltage generator and a built-in level shifter that generates complementary switch control signals with a larger voltage swing, minimizing leakage currents and enabling full switching of switch transistors, thereby improving output voltage and reducing rising and falling times of clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the DC-DC converter is integrated on glass substrate, then implementation is simplified and costs are reduced, but clock skew occurs due to loading effect causing charge-sharing problems
Solution Approach 1:
A buffer stage is introduced as an intermediary component between the clock signal source and the DC-DC converter. This buffer acts as a mediator that isolates the clock signal from the loading effects of the panel, preventing distortion while maintaining the integrated architecture on glass substrate.
Solution Approach 2:
The system is segmented into distinct functional blocks: a clock signal source, a buffer stage, and the DC-DC converter. This segmentation allows the buffer to handle the loading effect separately, protecting the clock signal integrity while keeping the overall implementation simple and integrated.
2Ease of operation
If clock signal is transmitted through coupling capacitors, then control signals are generated, but skewed clock signal still reaches switch transistor causing charge-sharing problem
Solution Approach 1:
The buffer stage performs preliminary action by correcting and stabilizing the clock signal before it reaches the coupling capacitors and switch transistor. This preliminary correction prevents the skewed signal from causing charge-sharing problems in the charge pump.
Solution Approach 2:
The buffer serves as an intermediary that processes the clock signal before it enters the control path through coupling capacitors. This intermediary action ensures that even though coupling capacitors are used for control signal generation, the clock signal integrity is maintained.
3Productivity
If switch transistor is controlled by conventional clock signal, then switching operation is performed, but transistor cannot fully turn on or off in time resulting in charge-sharing
Solution Approach 1:
The buffer stage acts as an intermediary that conditions the clock signal to provide adequate voltage swing and timing margins. This allows the switch transistor to fully turn on and off within the required time, eliminating charge-sharing while maintaining switching operation.
Solution Approach 2:
The buffer changes the parameters of the clock signal, specifically the voltage swing and edge timing, to ensure that the switch transistor receives a signal with sufficient amplitude and timing precision to achieve complete switching action within the available time.
Data Source
AI summary
A DC-DC converter for a display. The DC-DC converter comprises a negative voltage generator, a level sifter and a DC-DC sub-converter. The negative generator generates a negative voltage. The level shifter, coupled to the negative voltage generator, generates complementary switch control signals. The DC-DC sub-converter coupled to the level shifter operates in response to the complementary switch control signals.