DC/DC Converter Neutral Point Voltage Balance Control
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Solution Overview
Problem
High-voltage DC/DC converters with three-level circuits face challenges in neutral point voltage balance due to inconsistent hardware parameters, affecting safety and operation, and existing control methods struggle to achieve balanced neutral point voltage without compromising zero voltage switching (ZVS) and causing uneven switching and conduction losses.
Innovation Solution
A phase-shift modulation control method is introduced, where the duty cycle of control signals for switches in a series dual half-bridge three-level bridge arm is adjusted using a phase shift angle to balance the voltage of the neutral point, ensuring symmetrical working modes and uniform stress on switches, thereby improving neutral point balance and energy efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional control methods are used for three-level DC/DC converters, then the converter can operate, but the neutral point voltage becomes unbalanced due to inconsistent hardware parameters
Solution Approach 1:
The patent implements a neutral point voltage balance control method that continuously monitors the neutral point voltage and adjusts the switching states of bridge arms based on detected voltage deviations. This feedback mechanism dynamically compensates for hardware parameter inconsistencies, maintaining voltage balance without disrupting converter operation.
Solution Approach 2:
The patent modifies switching parameters (duty cycles, switching frequencies) of bridge arms to regulate neutral point voltage. By dynamically adjusting these parameters based on voltage balance requirements, the system compensates for hardware inconsistencies and maintains stable operation.
2Reliability
If existing control methods attempt to balance neutral point voltage, then voltage balance may be achieved, but zero voltage switching (ZVS) cannot be ensured
Solution Approach 1:
The patent employs dynamic switching strategies where the switching states and timing are continuously adjusted based on real-time voltage balance conditions and load requirements. This dynamic approach ensures that ZVS conditions are maintained while achieving voltage balance, as the switching waveform adapts to changing operating conditions rather than using fixed patterns.
Solution Approach 2:
The control method implements periodic switching patterns with adjustable duty cycles that create favorable conditions for ZVS. By using periodic switching actions with optimized timing, the system ensures that switches turn on when voltage is zero, minimizing switching losses while maintaining voltage balance through periodic adjustment of switching parameters.
3Productivity
If existing control methods are used, then the converter operates, but switching and conduction losses become uneven across switches
Solution Approach 1:
The patent introduces asymmetric switching patterns where different bridge arm switches operate with different duty cycles and timing characteristics. This asymmetry allows each switch to operate under optimized conditions, balancing the switching and conduction losses across all switches despite the inherent hardware parameter variations, thereby improving overall efficiency.
Data Source
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AI summary
A DC/DC converter includes a first capacitor and a second capacitor coupled to a first node, a first switch and a second switch coupled between the first node and a second node, a third switch and a fourth switch coupled between the first node and a third node, a first passive network coupled between a fourth node and a fifth node, the first passive network connecting the fourth node and the fifth node in series to a primary winding of a transformer, and a secondary side circuit coupled to a secondary winding of the transformer; a control method of the DC/DC converter includes: adjusting a phase shift angle between control signals of the first switch and the fourth switch to reduce a voltage difference between the first capacitor and the second capacitor.