DC/DC Converter Reverse Recovery Charge Nulling via Slope Detection
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Solution Overview
Problem
Switching mode power converters face limitations due to high diode conduction and reverse recovery losses, which restrict the maximum switching frequency and prevent size reduction, primarily because of the need to manage the reverse recovery charge in the body diode of the low-side switching transistor during dead times.
Innovation Solution
The solution involves a switching mode power converter circuit that uses a detection circuit to sense the voltage slope at the intermediate node, generating a switching control signal to accurately determine the dead time, thereby reducing the reverse recovery charge and thermal stress on the low-side transistor switch. This is achieved by setting optimal timing for the activation of the transistor switches based on the slope detection, using a slope detector circuit and time-to-digital conversion circuit to generate a digital signal indicative of the dead time, allowing for cycle-by-cycle adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the dead time is extended to allow complete reverse recovery charge removal, then the reliability of the switching transistor is improved, but the switching frequency is reduced and the converter size increases
Solution Approach 1:
The patent implements dynamic dead time adjustment by continuously monitoring the reverse recovery charge removal status and adapting the dead time duration in real-time. The control circuit modifies the dead time based on actual transistor recovery conditions, allowing the system to optimize between reliability and switching frequency dynamically rather than using a fixed conservative value
Solution Approach 2:
The patent employs feedback mechanisms where the control circuit monitors the voltage across the body diode during the dead time period and uses this information to determine when reverse recovery charge removal is complete. This feedback enables precise control of the dead time duration, ensuring sufficient charge removal while minimizing unnecessary time extension that would limit switching frequency
2Temperature
If the dead time is extended to ensure complete charge removal, then the thermal stress on the transistor is reduced, but the converter efficiency and power density are degraded
Solution Approach 1:
The system dynamically adjusts dead time based on actual thermal and electrical conditions, reducing dead time when thermal stress is manageable and increasing it when needed for charge removal. This dynamic approach prevents excessive dead time that would waste energy while ensuring sufficient charge removal to protect the transistor
Solution Approach 2:
The patent changes the dead time parameter adaptively based on operating conditions, transistor temperature, and load current. By modifying this critical timing parameter in response to real-time measurements, the system optimizes the balance between thermal management and energy efficiency
3Loss of energy
If the dead time is extended to allow complete reverse recovery charge removal, then the switching losses are reduced, but the maximum switching frequency is limited and the converter cannot be miniaturized
Solution Approach 1:
The patent implements dynamic dead time optimization that adapts to different operating conditions and transistor recovery characteristics. By continuously adjusting the dead time to the minimum necessary value for complete charge removal, the system minimizes switching losses while maintaining high switching frequency capability, enabling compact converter design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency of the switching mode power converter by reducing reverse recovery losses and thermal stress, enabling higher maximum switching frequencies and allowing for more compact designs without the need for additional components.
Implementation Method 1
a detection circuit for sensing a voltage slope at an intermediate node arranged between the first transistor switch and the second transistor switch
Implementation Method 2
During these periods, the output inductor produces a freewheeling current that flows through the body diode of the low-side switching transistor
Implementation Method 3
The minority charges may be removed either actively via negative current, or passively via recombination inside the device
Data Source
AI summary
A switching mode power converter circuit and a method are presented. The circuit comprises a first transistor switch and a second transistor switch coupled in series between an input voltage level and ground. There is a control circuit for controlling switching operation of the first transistor switch and the second transistor switch. There is a detection circuit for sensing a voltage at an intermediate node arranged between the first transistor switch and the second transistor switch, for deriving an indication of a slope of the sensed voltage, and for generating a switching control signal for the control circuit on the basis of the derived indication of the slope of the sensed voltage. The control circuit sets a first timing for activating the first transistor switch and/or a second timing for activating the second transistor switch on the basis of the switching control signal.