DC-DC Converter Fast Wakeup Using Feedback Capacitor Storage
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Solution Overview
Problem
DC-DC converters face significant delays and power inefficiencies when transitioning between operational and low power modes due to slow stabilization of voltage trimming circuits, leading to potential damage and increased power consumption.
Innovation Solution
Incorporating a feedback regulation loop with a comparator and feedback capacitor that samples and stores the operational voltage, allowing the charge pump to transition quickly to the operational mode while the voltage trimming circuit stabilizes, thereby reducing delays and overshoot.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If DC-DC converter transitions from low power mode to operational mode, then power consumption increases and components are activated, but significant delay occurs due to voltage trimming circuit stabilization
Solution Approach 1:
The feedback capacitor is pre-charged to the reference voltage before mode transition, and the hysteresis comparator is pre-configured with appropriate thresholds. This preliminary preparation allows the charge pump to immediately resume operation upon exiting low power mode without waiting for the voltage trimming circuit to stabilize, eliminating the startup delay while maintaining stable feedback voltage.
2Speed
If DC-DC converter remains in operational mode with all components active, then fast response is achieved, but power consumption increases
Solution Approach 1:
The DC-DC converter dynamically switches between operational mode and low power mode based on system requirements. The hysteresis comparator continuously monitors the feedback voltage and automatically triggers mode transitions when voltage thresholds are crossed, enabling the system to adapt its power consumption and response characteristics in real-time without manual intervention.
Solution Approach 2:
The feedback regulation loop continuously monitors the output voltage and provides feedback to the hysteresis comparator. This feedback mechanism ensures that the converter maintains stable operation during mode transitions and automatically responds to voltage deviations, enabling fast recovery from low power mode while maintaining energy efficiency through intelligent power management.
3Use of energy by moving object
If voltage trimming circuit is deactivated in low power mode, then power consumption decreases, but voltage stability is compromised
Solution Approach 1:
The feedback capacitor acts as an intermediary that stores the reference voltage and provides it to the hysteresis comparator during low power mode. This intermediary component maintains the feedback regulation function without requiring the voltage trimming circuit to remain active, enabling power savings while preserving voltage stability through the stored reference voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables fast and efficient mode transitions, minimizing delays and power consumption, and preventing damage to downstream components by maintaining a stable feedback voltage during low power mode and quickly recovering voltage drops.
Implementation Method 1
a feedback capacitor is configured to sample and hold a feedback voltage
Implementation Method 2
a hysteresis comparator is configured to detect an output of the charge pump
Data Source
AI summary
Systems, methods, and devices implement direct current (DC)-DC converters having fast wake up times and low ripple effects. Methods include determining a DC-DC converter is to be transitioned from an operational mode to a low power mode, and storing a voltage at an input of a comparator coupled to an input of a charge pump, the voltage being stored in a feedback capacitor of a feedback regulation loop. The methods further include uncoupling a voltage trimming circuit from the input of the comparator, and maintaining, at least in part, the stored voltage at the feedback capacitor during the low power mode.


