Multi-Phase DC-DC Converter PWM Sequencing for Latch-Up Prevention

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Solution Overview

Problem

Latch-up conditions in multi-phase DC-DC converters can occur due to parasitic structures interacting, leading to high currents that disrupt normal operation and cause damage, particularly when transitioning from a high-impedance state to an active state in the power stage circuitry.

Innovation Solution

Incorporating a latch-up pre-detection circuit that monitors PWM signals and overrides the control sequence to briefly pulse the low-side transistor ON when a transition from high-impedance to active state is detected, redirecting residual current through the transistor channel to prevent the formation of a low impedance path and reduce the likelihood of latch-up.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the power stage circuitry transitions from high-impedance state to active state, then the converter can operate normally, but latch-up may occur due to parasitic structures interacting

Engineering Contradiction:
Improveoperational reliabilityVSAvoidlatch-up risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by detecting the transition from high-impedance to active state before latch-up can occur, and preemptively pulsing the low-side transistor to redirect residual current. The latch-up pre-detection circuit monitors PWM signals and activates the protective low-side pulse before the parasitic structures can interact and cause latch-up, thus preventing the harmful effect before it manifests.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If residual current is not managed during state transitions, then latch-up can occur, but additional current management circuitry increases device complexity

Engineering Contradiction:
Improvelatch-up preventionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary latch-up pre-detection circuit that sits between the PWM control logic and the power stage transistors. This intermediary circuit monitors the PWM signals, detects state transitions, and generates the protective low-side pulse without requiring complex additional current management circuitry. The intermediary approach manages residual current with minimal added complexity by leveraging existing PWM signal paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the low-side transistor is pulsed ON to redirect current, then latch-up is prevented, but the switching sequence becomes more complex

Engineering Contradiction:
Improvelatch-up preventionVSAvoidPWM sequencing
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The latch-up pre-detection circuit performs self-service by automatically detecting the high-impedance to active state transition and generating the protective low-side pulse without external intervention. The circuit monitors its own input PWM signals and autonomously determines when the protective pulse is needed, eliminating the need for complex external PWM sequencing control and simplifying the overall operation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250379510A1Power stage safety and latch-up prevention in multi-phase DC-DC converter by ensuring safe PWM sequencing
Publication Date: 2025.12.11 TEXAS INSTRUMENTS INC
  • US20250379510A1 patent drawing
  • US20250379510A1 patent drawing
  • US20250379510A1 patent drawing

AI summary

The techniques and circuits, described herein, include solutions for latch-up prevention in multi-phase direct current (DC) to DC converters by ensuring safe pulse width modulation (PWM) control sequencing. In some aspects a latch-up pre-detection circuit has first and second detection inputs configured to receive high-side and low-side PWM signals respectively. The latch-up pre-detection circuit is configured to monitor for a transition from a first state to a second state based on the first and second detection inputs. The transition from the first state to the second state may be associated with condition(s) favorable for latch-up. Upon detecting the transition from the first state to the second state, the latch-up pre-detection circuit can output a pulse signal to temporarily override the unsafe PWM control sequence and reduce the possibility of latch-up.