DC-DC Converter Timing Regulation Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power converter designs face challenges in accurately predicting inductor current ramp-up and ramp-down times during switching cycles, relying on high-speed comparators that are difficult to design and prone to timing errors due to propagation delays and DC offset errors.
Innovation Solution
A timing regulation circuit translates the volt-second balance principle from the voltage domain to the current domain, using a common capacitor and timers to regulate the duration of operating phases, eliminating the need for high-speed comparators by generating source and sink currents proportional to differential voltages across the inductor, and controlling a volt-second balancing switch to maintain inductor current balance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-speed comparators are used to detect inductor current reversal, then current detection accuracy is improved, but device complexity and propagation delay errors increase
Solution Approach 1:
The patent extracts the timing detection function from the current comparator and relocates it to the timing regulation circuit. By using the predetermined time interval signal to directly control the volt-second balancing switch, the system eliminates the need for high-speed current comparators while maintaining accurate detection of inductor current reversal timing.
Solution Approach 2:
The patent introduces a timing regulation circuit as an intermediary between the voltage domain control and current domain operation. This circuit uses predetermined time intervals derived from voltage measurements to indirectly control current timing, avoiding direct high-speed current comparison while achieving equivalent control accuracy.
2Speed
If high-speed comparators are used to detect inductor current reversal, then current detection speed is improved, but timing error due to propagation delay increases
Solution Approach 1:
The patent performs preliminary timing setup by pre-determining the time interval signal based on voltage measurements before the actual current reversal occurs. The timing regulation circuit prepares the control signal in advance, eliminating propagation delay errors that would occur during real-time current comparison.
Solution Approach 2:
The patent replaces the mechanical/electrical comparison process with a timing-based control mechanism. Instead of using comparators to detect current reversal in real-time, the system uses predetermined time intervals to proactively control the volt-second balancing switch, substituting direct current measurement with time-based indirect control.
3Reliability
If conventional current comparators are used, then inductor current reversal detection is achieved, but DC offset error affects measurement precision
Solution Approach 1:
The timing regulation circuit serves as an intermediary that translates voltage domain information into current domain timing control without requiring direct current measurement. This indirect approach avoids DC offset errors inherent in current comparators while maintaining reliable detection of current reversal timing.
Solution Approach 2:
The patent substitutes the current comparison mechanism with a voltage-based timing control mechanism. By measuring voltage and converting it to a predetermined time interval, the system eliminates DC offset errors that plague direct current measurement while achieving the same functional goal of detecting current reversal timing.
Data Source
AI summary
A timing regulation circuit includes a fixed and tunable timer. A current source generates a source current I1 proportional to an inductor voltage ΔV1 of a DC-DC converter during an energizing phase and a current source generates a sink current I2 proportional to inductor voltage ΔV2 during a de-energizing phase. The fixed timer controls a first switch in series with I1 or I2 and the tunable timer controls a balancing switch in series with the other current. I1 or I2 is coupled by the first switch and the other current is coupled by the balancing switch to a common capacitor that provides a regulation voltage to the tunable timer which outputs a regulated duration (Tregulated) for an energizing or de-energizing phase. When Tregulated closes the balancing switch the common capacitor provides a predicted current returning inductor current to a starting value when all phases finish for providing a volt-second balance.