DC-DC Converter Valley Skipping Mode for Turn-On Loss Reduction

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Solution Overview

Problem

Quasi-resonant flyback converters face inefficiencies due to turn-on losses in the primary MOSFET, particularly at varying load conditions, where full zero-voltage switching is not consistently achieved, leading to partial or incomplete elimination of turn-on losses.

Innovation Solution

The implementation of a valley skipping mode in DC-DC power converters, where the primary FET is turned on during a second or subsequent resonant voltage valley and allows negative current in the secondary winding before turning off the synchronous rectifier during multiple resonant voltage valleys, optimizing energy transfer and reducing losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If valley switching mode is used to eliminate turn-on losses, then efficiency is improved, but full zero-voltage switching cannot be achieved when reflected output voltage is lower than DC input voltage

Engineering Contradiction:
Improveturn-on lossVSAvoidzero-voltage switching achievement
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent segments the resonant voltage waveform into multiple valleys and selectively skips certain valleys (turning on the primary FET during the second or subsequent valley rather than the first) to achieve more complete voltage discharge and better zero-voltage switching conditions across varying load and input voltage conditions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts the switching strategy based on operating conditions by allowing negative current in the secondary winding during multiple resonant voltage valleys, enabling the system to adapt to varying load conditions and maintain improved zero-voltage switching achievement across different operating points

Inventive Principle:
Principle #15Dynamics

2Productivity

If the primary FET is turned on during the first resonant voltage valley, then switching frequency is reduced, but turn-on losses are not fully eliminated

Engineering Contradiction:
Improveswitching frequencyVSAvoidturn-on loss
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies valley skipping by intentionally skipping the first resonant voltage valley and turning on the primary FET during the second or subsequent valley, allowing the resonant capacitor to discharge more completely and achieve lower turn-on losses while maintaining acceptable switching frequency

Inventive Principle:
Principle #21Skipping (Rushing through)

3Loss of energy

If synchronous rectifier is turned off immediately at zero current, then conduction losses are reduced, but energy transfer optimization is not achieved

Engineering Contradiction:
Improveconduction lossVSAvoidenergy transfer efficiency
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent allows negative current to flow in the secondary winding during multiple resonant voltage valleys before turning off the synchronous rectifier, which preliminarily prepares the magnetic energy in the transformer for more complete transfer to the output, optimizing energy transfer while managing conduction losses

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances efficiency by allowing zero-voltage switching of the primary FET, reducing turn-on losses and improving overall converter efficiency across different load conditions, as demonstrated by increased efficiency percentages at various load levels.

Implementation Method 1

energy stored in a primary MOSFET drain capacitor (i.e., an equivalent capacitance), resonates through a magnetizing inductance of a transformer

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS10218284B1DC-DC power converters including a valley skipping mode and methods of operating DC-DC power converters
Publication Date: 2019.02.26 AES GLOBAL HLDG PTE LTD
  • US10218284B1 patent drawing
  • US10218284B1 patent drawing
  • US10218284B1 patent drawing

AI summary

A DC-DC power converter includes an input, an output, a transformer, and a primary FET coupled to selectively conduct current though a primary winding of the transformer. The primary FET includes a drain that experiences multiple resonant voltage valleys during each dead-time period of the converter. The converter further includes a synchronous rectifier coupled to selectively conduct current through a secondary winding of the transformer, and a control circuit. The control circuit is configured to operate the primary FET in a valley skipping mode by turning on the primary FET during a second or subsequent one of the multiple resonant voltage valleys, and to allow a negative current in the secondary winding of the transformer before turning off the synchronous rectifier during one or more of the multiple resonant voltage valleys. Methods of operating DC-DC power converters are also disclosed.