DC Isolated Semiconductor Die Using FEOL and BEOL Circuit Segmentation
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Solution Overview
Problem
Integrated circuits (ICs) face challenges in achieving DC isolation between circuits formed during different fabrication processes, particularly between FEOL and BEOL processes, which are essential for safety and efficiency in applications like AC/DC converters where circuits are connected to grounds at different potentials, limiting the ability to manufacture cost-effective and safe ICs on a single die.
Innovation Solution
The implementation of a semiconductor die with two DC isolated circuits, where one circuit is formed using FEOL devices and the other using BEOL devices, with additional BEOL-formed devices and insulation layers ensuring no DC path exists between them, allowing for the creation of ICs that can be mounted on a single die with separate ground connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If circuits are formed using traditional FEOL and BEOL processes on the same silicon substrate, then manufacturing cost is reduced and space efficiency is improved, but DC isolation between circuits cannot be achieved
Solution Approach 1:
The patent divides the circuit formation process into two separate segments: FEOL-formed circuits and BEOL-formed circuits. FEOL devices (transistors, diodes, capacitors) are formed during the front-end process, while BEOL devices (metal interconnect structures, resistors) are formed during the back-end process. This segmentation allows each circuit to be electrically isolated from the other, achieving DC isolation while maintaining cost-effectiveness by using the same silicon substrate and standard fabrication processes.
Solution Approach 2:
The patent introduces an intermediary approach by using the BEOL process to form isolation structures (such as metal layers and dielectric materials) that physically and electrically separate the FEOL-formed circuit from the BEOL-formed circuit. This intermediary layering prevents DC current flow between the two circuits while allowing both to coexist on the same die, thus achieving DC isolation without increasing manufacturing complexity.
2Reliability
If DC isolation is implemented between circuits on the same die, then safety is improved and different ground potentials can be used, but device complexity increases
Solution Approach 1:
The patent segments the circuit design into two independent electrical domains: one domain contains FEOL-formed devices connected to a first ground potential, while the other domain contains BEOL-formed devices connected to a second ground potential. This segmentation inherently provides DC isolation and safety without requiring additional complex isolation components, as the process-based separation creates natural electrical boundaries between the two ground domains.
Solution Approach 2:
The patent makes the BEOL process serve multiple functions: it not only forms the interconnect structure for circuit operation but also simultaneously creates the isolation structures that separate the two circuits. The metal layers and dielectric materials deposited during BEOL serve dual purposes as both functional circuit elements and isolation barriers, thereby reducing overall device complexity while achieving DC isolation and safety.
3Reliability
If FEOL and BEOL devices are used to form separate circuits, then DC isolation is achieved and safety is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent applies preliminary action by forming all FEOL devices (transistors, diodes, capacitors) during the front-end process before the BEOL process begins. This preliminary formation of FEOL circuits establishes the first electrical domain with its ground reference early in the fabrication sequence. Subsequently, the BEOL process forms the second circuit and simultaneously creates the isolation structures, ensuring DC isolation is built-in from the outset rather than requiring additional post-processing steps.
Solution Approach 2:
The patent maintains continuity of useful action by seamlessly integrating the FEOL and BEOL processes into a continuous fabrication sequence. The BEOL process continues from where FEOL left off, using the same silicon substrate and building upon the FEOL structures. This continuous process flow forms both circuits and isolation structures in an uninterrupted manufacturing sequence, avoiding the need for separate fabrication runs or additional complex process steps, thereby achieving DC isolation without significantly increasing manufacturing process complexity.
Data Source
AI summary
A semiconductor die is disclosed upon which is formed direct current (DC) isolated first and second circuits. The first circuit is configured for electrical connection to a first ground. The second circuit is configured for electrical connection to a second ground. The first and second grounds can be at different potentials. The first and second circuits were formed using front end of line (FEOL) and back end of line (BEOL) processes. The first circuit includes a plurality of first devices, such as transistors, which were formed during the FEOL process, and the second circuit includes only second devices, such as transistors, which were formed during the BEOL process.