Motor Drive DC Link Voltage Sensing With MUX Fault Detection
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Solution Overview
Problem
Conventional motor drive systems lack precise DC link voltage measurement resolution and effective fault detection, particularly for under-voltage and over-voltage conditions, which can lead to undefined behavior and reduced operational availability.
Innovation Solution
A motor drive system incorporating a MUX circuit, DC voltage scaling circuit, fault detection circuit, and ADC, along with an FPGA, that selectively establishes signal paths, measures DC link voltage, and compares it to reference voltages to output normal or fault signals, enabling improved resolution and Built-In-Test functionality for fault detection and protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional voltage measurement methods are used, then the system structure remains simple, but the DC link voltage measurement resolution is insufficient
Solution Approach 1:
The patent divides the voltage measurement process into multiple segments: a voltage divider circuit for initial scaling, a MUX for selecting different measurement ranges, and an ADC for digital conversion. This segmentation allows high-voltage measurement to be broken down into manageable stages, improving resolution without requiring a single complex high-voltage ADC.
Solution Approach 2:
The patent introduces intermediary components between the DC link and the ADC: a voltage divider circuit acts as an intermediary to scale down the high voltage to a measurable range, and a MUX serves as an intermediary to selectively connect different voltage sources to the ADC. These intermediaries enable precise measurement while maintaining system modularity.
2Reliability
If no fault detection circuit is implemented, then the system complexity is reduced, but the system cannot detect under-voltage or over-voltage faults
Solution Approach 1:
The patent implements preliminary fault detection by comparing the DC link voltage against predefined under-voltage and over-voltage thresholds before faults can cause damage. The fault detection circuit continuously monitors voltage levels and triggers protection signals in advance, preventing undefined system behavior and potential damage.
Solution Approach 2:
The patent establishes a feedback mechanism where the fault detection circuit continuously monitors the DC link voltage and provides real-time feedback to the control system. When voltage deviations are detected, the system receives feedback signals to activate protection modes, creating a closed-loop control system that enhances reliability through continuous monitoring and automatic response.
3Adaptability or versatility
If a single reference voltage is used for ADC, then the reference voltage circuit is simple, but the system cannot adapt to different voltage measurement ranges
Solution Approach 1:
The patent implements a universal reference voltage system where a single ADC reference voltage serves multiple measurement ranges. The MUX enables this single reference to be used across different voltage scaling configurations, allowing the system to measure both low-voltage and high-voltage ranges using the same ADC and reference voltage, thereby achieving multi-functionality without proportionally increasing complexity.
Solution Approach 2:
The patent introduces dynamic switching capability through the MUX, which can dynamically reconfigure the measurement circuit to adapt to different voltage ranges. This dynamic reconfiguration allows the system to switch between measuring DC link voltage, reference voltage, and other signals as needed, providing adaptability while maintaining a relatively simple hardware architecture through time-multiplexed operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system provides enhanced DC link voltage measurement resolution and reliable fault detection, allowing for dynamic adjustment of reference voltages and protection operations, thereby ensuring proper motor drive operating modes and preventing undervoltage and overvoltage faults.
Implementation Method 1
a voltage divider circuit including a first resistor and a second resistor. The first resistor includes a positive terminal configured to establish connection with the positive voltage rail and includes a first opposing terminal connected to a second opposing terminal of the second resistor to establish a mid-point node
Implementation Method 2
an analog-to-digital converter (ADC) configured to convert one or more input analog voltages into respective corresponding output digital voltages
Implementation Method 3
a fault detection circuit configured to receive the output DC link voltage, an under-voltage (U/V) reference voltage, and an over-voltage (O/V) reference voltage, and to output one of a normal operation signal or a fault signal in response to comparing the DC link voltage to one or both of the U/V reference voltage and the O/V reference voltage
Data Source
AI summary
A motor drive system includes a MUX circuit, a DC voltage scaling circuit, a fault detection circuit, an ADC, and an FPGA. The MUX circuit selectively establishes a MUX input signal path and a MUX output signal path. The DC voltage scaling circuit measures a DC link voltage. The fault detection circuit receives the output DC link voltage and outputs one of a normal operation signal or a fault signal in response to comparing the DC link voltage to one or both of a U/V reference voltage and an O/V reference voltage. The ADC converts one or more input analog voltages into respective corresponding output digital voltages. The FPGA is in signal communication with the ADC output (ADCOUT) and the MUX circuit, and is configured to control the motor drive system based on a comparison between one or more of the output digital voltages.