DC Offset Cancellation in OFDM Direct-Conversion Receivers

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Solution Overview

Problem

Direct-conversion receivers in OFDM systems face significant challenges in removing DC offset, which distorts input signals and affects signal quality due to self-mixing of drift signals in quadrature converters.

Innovation Solution

An apparatus that calculates and cancels DC offset by using an adding and averaging unit, accumulator, synchronization determiner, and pulse density modulation signal generator to determine and output a DC offset control value, generating a digital pulse density modulation signal to shift and remove the DC offset from input signals, especially after synchronization is acquired.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If direct-conversion method is used to down-convert RF signal to baseband, then receiver cost is reduced and complexity is lowered, but DC offset is generated due to self-mixing of drift signals

Engineering Contradiction:
Improvereceiver complexityVSAvoidDC offset
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and removes the DC offset component from the baseband signal by calculating the average value of the signal over a frame period. The adding and averaging unit computes the mean value, which represents the DC offset, and this extracted offset is then used to cancel the harmful DC component from the original signal.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a feedback mechanism where the calculated DC offset is fed back to the signal processing chain. The accumulator stores the DC offset control value, and this feedback signal is used to continuously adjust and cancel the DC offset in subsequent processing stages, ensuring ongoing compensation for the harmful effect.

Inventive Principle:
Principle #23Feedback

2Reliability

If DC offset cancellation is performed continuously, then signal quality is improved, but processing complexity and computational load increase

Engineering Contradiction:
Improvesignal qualityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs DC offset cancellation periodically rather than continuously by calculating the DC offset once per frame using the adding and averaging unit. This periodic approach maintains signal quality through regular offset removal while significantly reducing computational complexity compared to continuous cancellation methods.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent performs preliminary DC offset calculation during the synchronization phase using the synchronization determiner. By calculating and storing the DC offset control value in advance during the preamble period, the system prepares the offset compensation data before main signal processing begins, reducing real-time processing requirements.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8170147B2Apparatus for cancelling DC offset and method thereof
Publication Date: 2012.05.01 KT CORP
  • US8170147B2 patent drawing
  • US8170147B2 patent drawing
  • US8170147B2 patent drawing

AI summary

An apparatus and method for canceling a DC offset efficiently removes the DC offset by calculating the DC offset after acquiring synchronization in a terminal receiver used for an orthogonal frequency division multiplexing system. The apparatus for canceling the DC offset includes an adding/averaging unit (130), an accumulator (140), a synchronization determiner (150), and a pulse density modulation signal generator (160). The adding and averaging the added input data signals over one frame. The accumulator (140) outputs a DC offset control value by successively accumulating the DX offsets calculated from the adding and averaging unit. The synchronization determiner (150) determines whether to output the DC offset control value provided by the accumulator (140) based on synchronization information. The pulse density modulation signal generator (160) generates a digital pulse density modulation signal based on a representative value provided by the synchronization determiner (150).