Switched-Resistor DC Offset Calibration for Low-Noise Receivers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High gain in wireless receivers leads to significant DC offset due to slight process variations, reducing the dynamic range of the output and increasing flicker noise from small transistors used in existing DC offset calibration circuits.
Innovation Solution
The implementation of a low-noise DC offset calibration circuit using switched resistor units and R-2R resistor arrays, which provide compensation current to feedback resistors, eliminating flicker noise by using resistors instead of transistor current sources and allowing binary control for DC offset compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistor current sources are used in DC offset calibration circuit, then DC offset compensation can be achieved, but flicker noise increases due to small transistor sizes required for high resolution
Solution Approach 1:
The patent replaces transistor-based current sources with resistor-based current sources in the DC offset calibration circuit. Specifically, switched resistors are used instead of switched current mirrors implemented with transistors. This substitution eliminates the flicker noise inherent in transistor operation while maintaining the ability to provide precise DC offset compensation currents through binary-weighted resistor values.
Solution Approach 2:
The patent changes the fundamental parameter of the current source implementation from active transistor devices to passive resistor devices. By using resistors with different resistance values (binary-weighted values such as R, 2R, 4R, etc.), the circuit achieves the same current control functionality without the noise-generating characteristics of transistors. The resistance values are carefully selected to provide the required current resolution for DC offset calibration.
2Power
If high gain is used in wireless receiver, then signal amplification is improved, but DC offset increases due to process variations
Solution Approach 1:
The patent implements a DC offset calibration circuit that provides feedback compensation for the DC offset generated by the high-gain receiver front end. The calibration circuit includes switched resistors that can be activated to inject compensating currents into the receiver signal path, effectively canceling the DC offset components that arise from process variations and mismatch in the high-gain amplifier and mixer stages.
Solution Approach 2:
The patent extracts and separately addresses the DC offset problem from the main signal path by implementing a dedicated calibration circuit. The DC offset calibration circuit operates independently to generate compensation currents that are then injected back into the signal path to cancel the unwanted DC components, allowing the high-gain receiver to operate without being limited by DC offset issues.
Data Source
AI summary
A DC offset calibration circuit has a first resistor, a first switch, a second resistor, and a second switch. The first resistor is coupled to a first supply voltage. The first switch is coupled to the first resistor, to a first input of an amplifier, and to a first input resistor. A second end of the first input resistor is not coupled to the first supply voltage. The second resistor is coupled to a second supply voltage. The second switch is coupled to the second resistor, to a second input of the amplifier, and to a first end of a second input resistor. A second end of the second input resistor is not coupled to the second supply voltage.