DC Offset Correction Loop Using Mean-Value Tracking
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Solution Overview
Problem
Existing demodulation circuits face performance degradation due to unwanted DC signal components, which require complex and power-consuming circuitry for removal, leading to inefficiencies in modulated signal processing.
Innovation Solution
A DC offset correction circuit with a feedback loop that tracks the mean value of a modulated input signal, using a DAC and ADC to generate a correction signal that subtracts the DC offset, optimizing the dynamic range and reducing circuit complexity by reconfiguring hardware components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex circuitry is used to remove DC offset components, then DC offset removal effectiveness is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts only the necessary functionality for DC offset removal by using a minimal feedback loop consisting of an ADC, DAC, and subtractor, eliminating the need for complex dedicated DC removal circuitry while maintaining effectiveness
Solution Approach 2:
The feedback loop components (ADC, DAC, subtractor) are designed to perform multiple functions: they track the mean value, generate correction signals, and remove DC offsets, thereby reducing overall device complexity through multi-functional integration
2Reliability
If complex circuitry is used to remove DC offset components, then DC offset removal effectiveness is improved, but power consumption increases
Solution Approach 1:
The patent extracts only the essential components needed for DC offset removal, eliminating power-consuming elements found in complex traditional circuits while maintaining removal effectiveness through the streamlined feedback loop
Solution Approach 2:
The feedback loop automatically tracks and corrects DC offset components without requiring external power-intensive processing, as the ADC-DAC-subtractor configuration self-regulates to maintain signal integrity with minimal power consumption
3Reliability
If additional hardware components are added for DC offset correction, then DC offset removal capability is improved, but area efficiency deteriorates
Solution Approach 1:
The patent extracts only the minimal necessary hardware components (ADC, DAC, subtractor) required for effective DC offset removal, eliminating redundant elements that would consume additional chip area while maintaining full correction capability
Solution Approach 2:
The patent merges the DC offset correction functionality with the existing signal processing pipeline by integrating the feedback loop components into the existing ADC and signal flow, thereby achieving DC offset removal without requiring separate dedicated hardware blocks that would increase area
Data Source
AI summary
Some embodiments of the invention relate to a DC offset correction circuit comprising a feedback loop having a DAC controlled by a reconfigurable ADC, which determines (e.g., tracks) the mean value of a modulated input signal. The circuit operates according to two phase process. In a first “pre-modulation” tracking phase, an input signal is tracked by the ADC, which is configured to output the input signal's mean value as a digital code equivalent to the input mean value. The output of the ADC is provided to a DAC, which provides an analog representation of the mean value to an adder that subtracts the mean value from the modulated input signal to generate a bipolar adjusted input signal. In a second “modulation” phase, the estimated mean value is held constant, so that the bipolar adjusted input signal may be provided to an activated modulation circuit for improved system performance.