Embedded DC-Removing CIC Filter for Low-Complexity Bias Removal

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional cascaded integrator-comb (CIC) filters face limitations in addressing DC bias issues, requiring external DC-removal filters that increase circuit complexity and resource usage, especially when dealing with significant sample rate changes in digital signal processing applications.

Innovation Solution

A modified CIC filter architecture that embeds a DC-removal filter within its integrator stages, utilizing storage flops and multiplier circuits to combine DC filter coefficients with delayed summation terms, reducing the need for external filters and minimizing circuit complexity and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an external DC-removal filter is connected before or after a CIC filter, then DC bias can be removed, but circuit complexity and resource usage increase

Engineering Contradiction:
ImproveDC bias removalVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the DC-removal filter and CIC filter into a single integrated device. The DC-removal filter section is merged with the CIC filter section, sharing common components such as delay elements and summation nodes. This integration eliminates the need for separate external DC-removal filters while maintaining both DC bias removal and sample rate change functionalities.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated device performs multiple functions within a single architecture: it simultaneously acts as a DC-removal filter and a CIC filter for sample rate changes. The first section removes DC bias from the input signal, while the second section performs the CIC filtering and rate conversion, making the device universally applicable for both DC removal and multi-rate processing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If an external DC-removal filter is used with CIC filter, then DC bias is removed, but gate count and circuit area increase

Engineering Contradiction:
ImproveDC bias removalVSAvoidgate count
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the DC-removal filter and CIC filter into a single integrated device. The DC-removal filter section is merged with the CIC filter section, sharing common components such as delay elements and summation nodes. This integration eliminates the need for separate external DC-removal filters while maintaining both DC bias removal and sample rate change functionalities.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If external DC-removal filter is connected, then DC bias can be removed, but architectural efficiency decreases

Engineering Contradiction:
ImproveDC bias removalVSAvoidarchitectural efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines the DC-removal filter and CIC filter into a single integrated device. The DC-removal filter section is merged with the CIC filter section, sharing common components such as delay elements and summation nodes. This integration eliminates the need for separate external DC-removal filters while maintaining both DC bias removal and sample rate change functionalities.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11075617B1DC-removing CIC filter
Publication Date: 2021.07.27 NXP USA INC
  • US11075617B1 patent drawing
  • US11075617B1 patent drawing
  • US11075617B1 patent drawing

AI summary

A DC-removing cascaded integrator-comb (CIC) filter circuit (40) includes N series-coupled integrator stages (401-405), a rate changer (406), and N series-coupled comb stages (407-411) which are configured to receive a CIC filter digital input signal and to generate a CIC filter digital output signal, wherein the N integrator stages include a first integrator stage (401) which includes a summation element (41) having first input for receiving a first input signal, a second input for receiving a second input signal, and an output coupled through a feedback delay element (42) to a multiplier element (43) which multiplies a DC-removing filter coefficient with an output of the feedback delay element to generate a product output that is provided to the second input of the summation element (41), thereby embedding a DC-removing filter in the N series-coupled integrator stages.