Multi-Level DC-DC Converter for Boundary Voltage and Switch Stress Control
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Solution Overview
Problem
Conventional DC-to-DC converter circuits face challenges in achieving a full range of output voltages while minimizing inductor size and avoiding voltage overstress on switch transistors, particularly due to limitations in voltage difference and switching frequency.
Innovation Solution
The development of multi-level DC-to-DC converter circuits that alternate between adjacent zones to generate output voltages close to and at the boundaries of each zone, incorporating a parallel 'shadow' capacitor voltage balancing circuit to prevent voltage overstress and allow for lossless voltage balancing through out-of-order state transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional DC-to-DC converter circuits use a single inductor and two switches, then the circuit structure is simple, but the inductor size increases when voltage difference is large or switching frequency is low
Solution Approach 1:
The patent divides the single inductor into multiple inductors (L1, L2, L3, L4) arranged in a multi-level converter topology. This segmentation allows each inductor to handle smaller voltage differences, enabling reduced individual inductor sizes while maintaining the required voltage conversion capability across the full output voltage range.
Solution Approach 2:
The patent transitions from a two-level converter to a multi-level converter architecture, adding voltage levels as an additional dimension. This dimensional change enables the converter to operate with smaller voltage differences across each stage, thereby reducing the required inductor size for each component while achieving the same overall voltage conversion.
2Loss of energy
If conventional DC-to-DC converter circuits operate at low switching frequency, then switching losses are reduced, but inductor size increases
Solution Approach 1:
By segmenting the voltage conversion into multiple stages with smaller voltage differences per stage, the patent enables the use of smaller inductors that can operate efficiently at higher switching frequencies, thereby reducing switching losses without requiring large inductor sizes.
Solution Approach 2:
The patent changes the operating parameters by introducing multiple voltage levels and adjusting the duty cycles of individual switches to optimize the voltage difference across each inductor, enabling efficient operation at higher switching frequencies with reduced inductor sizes.
3Ease of operation
If conventional DC-to-DC converter circuits use fixed duty cycle operation, then control is simple, but the ability to generate full range of output voltages is limited
Solution Approach 1:
The patent implements dynamic control where the duty cycles of individual switches (φ11, φ12, φ21, etc.) are continuously adjusted based on the desired output voltage level. This dynamic duty cycle control enables the multi-level converter to generate the full range of output voltages while maintaining relatively simple control circuitry.
Solution Approach 2:
The patent creates a universal converter topology that can operate in multiple modes (buck, boost, buck-boost) and generate the full range of output voltages by coordinating the operation of multiple switches and inductors, providing both versatility and simplified control through a unified control strategy.
4Device complexity
If conventional DC-to-DC converter circuits operate without voltage balancing, then the circuit is simpler, but voltage overstress occurs on switch transistors
Solution Approach 1:
The patent incorporates voltage balancing control that monitors the voltage across each inductor and adjusts the duty cycles of individual switches to maintain balanced operation. This feedback mechanism prevents voltage overstress on switch transistors by ensuring that no single inductor or switch is subjected to excessive voltage, thereby improving reliability.
Solution Approach 2:
The patent implements preliminary voltage balancing through the multi-level topology design, where the distributed inductor and switch arrangement inherently limits the voltage stress on individual components. The control system proactively balances voltages before overstress can occur, preventing reliability issues before they arise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a full range of output voltages across all operational zones with reduced inductor size and prevents voltage overstress on switch transistors, enhancing the efficiency and reliability of DC-to-DC converter circuits.
Implementation Method 1
Inductor L1 is coupled in a shunt configuration between switches φ11 and φ12. The switches may be, for example, electronic switches such as field effect transistors, particularly MOSFETs. Clock signals φ11 and φ12 are complementary and are provided by a clock/control circuit (not shown), in known fashion. The clocking duty cycle—the ratio of clock signal φ11 being ON versus OFF—determines the momentary voltage across the inductor L1, and hence the average voltage V2 at the output of the circuit
Data Source
AI summary
Multi-level DC-to-DC converter circuits and methods that permit a full range of output voltages, including near and at zone boundaries. Embodiments alternate among adjacent or near-by zones, operating in a first zone for a selected time and then in a second zone for a selected time. Embodiments may include a parallel capacitor voltage balancing circuit that connects a capacitor to a source voltage to charge that capacitor, or couples two or more capacitors together to transfer charge, all under the control of real-time capacitor voltage measurements. Embodiments may include a lossless voltage balancing solution where out-of-order state transitions are allowed, thus increasing or decreasing the voltage across specific capacitors to prevent voltage overstress on the converter main switches. Restrictions may be placed on the overall sequence of state transitions to reduce or avoid transition state toggling, allowing each capacitor an opportunity to have its voltage steered as necessary for balancing.