DCDC Converter Clock Generation Circuit Power Reduction

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Solution Overview

Problem

Existing DCDC converters consume excessive power due to continuous operation of control circuits, even when some circuits are not in use, leading to inefficiencies and increased power consumption.

Innovation Solution

Incorporating a potential hold portion with a capacitor and a switch controlled by a timer, utilizing an oxide semiconductor transistor with extremely low off-state current to intermittently hold constant potentials, allowing the bias circuit to be powered down without affecting performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the control circuit is continuously supplied with electric power to maintain performance, then the reliability and performance are maintained, but the power consumption increases

Engineering Contradiction:
ImproveperformanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The bias circuit generates constant potentials in advance and stores them in the potential hold portion (capacitor) before power is cut off. This preliminary action allows the stored potentials to be used later when power is restored, eliminating the need for continuous power supply to maintain these potentials.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The power supply to the bias circuit is interrupted periodically according to the operation mode (first mode for generation, second mode for holding). The timer controls the switch to alternate between powering the bias circuit and relying on stored potentials, creating a periodic on-off pattern that reduces average power consumption while maintaining functionality.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If the bias circuit is powered down to reduce power consumption, then the power consumption decreases, but the constant potential may drift or be lost

Engineering Contradiction:
Improvepower consumptionVSAvoidconstant potential
Core Design Contradiction:
Use of energy by moving objectVSStability of the object's composition

Solution Approach 1:

The potential hold portion (capacitor) acts as an intermediary between the bias circuit and the rest of the circuit. It temporarily stores the constant potentials generated by the bias circuit, allowing the bias circuit to be powered down while the stored potentials continue to function. The switch controls the connection between these components, enabling seamless transition between power-on and power-off states.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Stability of the object's composition

If the switch remains on to continuously provide constant potential, then the circuit operation is stable, but the power consumption increases

Engineering Contradiction:
Improvecircuit operationVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The switch is controlled to operate periodically, turning on during the first mode when the bias circuit is active and turning off during the second mode when the bias circuit is powered down. This periodic switching allows the system to alternate between generating fresh constant potentials and using stored potentials, reducing the duty cycle of power consumption while maintaining continuous circuit operation.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces power consumption by enabling the DCDC converter to operate without performance degradation even when power is stopped to some circuits, achieving low power consumption and maintaining efficiency.

Implementation Method 1

The OS transistor has characteristics of low off-state current, and the characteristics of the OS transistor are utilized to improve power conversion efficiency of the DCDC converter

Methodology Applied
Scientific EffectLow off-state current:

Implementation Method 2

The potential hold portion includes a capacitor and a switch

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9444337B2DCDC converter including clock generation circuit, error amplifier and comparator
Publication Date: 2016.09.13 SEMICON ENERGY LAB CO LTD
  • US9444337B2 patent drawing
  • US9444337B2 patent drawing
  • US9444337B2 patent drawing

AI summary

To provide a DCDC converter achieving low power consumption. A clock generation circuit, an error amplifier, a comparator, and a timer are included in a control circuit. The clock generation circuit, the error amplifier, and the comparator each include a bias circuit and a potential hold portion for intermittently holding a constant potential generated in the bias circuit. The potential hold portion includes a capacitor and a switch. The on or off of the switch is intermittently controlled using the timer. Even in a period in which the supply of voltage is stopped, a signal based on a constant potential generated in the bias circuit is continuously output.