DC/DC Converter Control with Frequency Division and Output Clamp
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Solution Overview
Problem
Existing DC/DC converters face challenges in efficiently regulating output voltage when input voltage fluctuates, particularly during drops, leading to potential overshoots and instability.
Innovation Solution
The implementation of a frequency division operation and a clamp circuit to stabilize the output voltage by adjusting the switching frequency and clamping the amplifier output voltage, combined with a control mechanism to manage the reference voltage based on input voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the switching frequency is increased to improve response speed during input voltage drops, then the response speed is improved, but output voltage overshoot and instability increase
Solution Approach 1:
The patent applies dynamics by making the switching frequency variable rather than fixed. The control device dynamically adjusts the switching frequency based on input voltage conditions: increasing frequency during normal operation for fast response, and decreasing frequency during input voltage drops to prevent overshoot. This dynamic adaptation resolves the contradiction between response speed and stability.
Solution Approach 2:
The patent changes the parameter of switching frequency based on operating conditions. By detecting input voltage levels and adjusting the switching frequency accordingly, the system optimizes performance across different scenarios. This parameter change allows the system to achieve both fast response when needed and stability when input voltage fluctuates.
2Measurement precision
If the amplifier output voltage is increased to improve voltage regulation, then voltage regulation is improved, but output voltage overshoot occurs during input voltage drops
Solution Approach 1:
The patent applies preliminary anti-action by implementing a clamp circuit that preemptively limits the amplifier output voltage when input voltage drops are detected. Instead of allowing the amplifier to produce excessive output that would cause overshoot, the clamp circuit预先 (in advance) constrains the voltage level, preventing the harmful effect before it occurs.
Solution Approach 2:
The clamp circuit acts as an intermediary between the amplifier and the rest of the system. It mediates the amplifier output by clamping it to a safe level, thereby protecting the system from overshoot while allowing the amplifier to maintain good voltage regulation within the clamped range.
3Stability of the object's composition
If the switching frequency is reduced to prevent output voltage overshoot, then output voltage stability is improved, but response speed decreases
Solution Approach 1:
The system dynamically adjusts switching frequency based on real-time input voltage conditions. During normal operation, high switching frequency provides fast response. During input voltage drops, frequency is reduced to maintain stability. This dynamic behavior resolves the contradiction by adapting the frequency to current operating conditions rather than using a fixed value.
Solution Approach 2:
The switching frequency parameter is changed based on detected input voltage levels. The control device monitors input voltage and adjusts the frequency parameter accordingly, allowing the system to optimize between response speed and stability for different operating scenarios.
Data Source
AI summary
Provided is a power source control device for a DC/DC converter including a high-side transistor, a low-side transistor, and an inductor, the power source control device including a first error amplifier configured to receive a first reference voltage and a feedback voltage based on an output voltage of the DC/DC converter, a second error amplifier configured to receive an output of the first error amplifier and a signal indicating information regarding a current flowing through the inductor, a first comparator configured to receive an output of the second error amplifier and a ramp voltage, a switching control unit configured to perform switching control of the high-side transistor and the low-side transistor according to an output of the first comparator, and a clamp circuit configured to clamp a second amplifier output voltage outputted from the second error amplifier, to a predetermined clamp voltage.


