DC-DC Converter Pulse-Skip Reference Sampling for Stable Output

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Solution Overview

Problem

DC-DC converters experience voltage overshoot or undershoot during transitions between pulse skip mode and normal mode due to delayed increase in inductor current, leading to unstable output.

Innovation Solution

A DC-DC converter design that includes a pulse skip reference voltage generation circuit which samples the sensing voltage during the reference on-time, generating a pulse skip reference voltage close to the peak value, allowing the error amplification voltage to rise immediately, thereby stabilizing the inductor current change during mode transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the DC-DC converter operates in pulse skip mode to conserve power during light load conditions, then power consumption is reduced, but voltage overshoot or undershoot occurs during mode transitions

Engineering Contradiction:
Improvepower consumptionVSAvoidoutput voltage stability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary action by generating the pulse skip reference voltage in advance during the reference on-time before mode transitions occur. The reference voltage is sampled and stored in the capacitor during normal operation, so when transitioning from pulse skip mode to normal mode, the error amplifier immediately has a valid reference voltage to compare against, preventing voltage overshoot or undershoot. This preliminary preparation of the reference voltage ensures stable output during load changes while maintaining power savings during light load conditions.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If the DC-DC converter uses traditional pulse skip mode control, then power is conserved during light load, but the inductor current increases delayed causing unstable output

Engineering Contradiction:
Improvepower consumptionVSAvoidinductor current response speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent implements feedback by continuously monitoring the inductor current through the sensing circuit and using this information to generate the pulse skip reference voltage. The error amplifier compares the feedback voltage (proportional to output voltage) with the pulse skip reference voltage to determine whether to skip pulses. This feedback mechanism ensures that when load increases, the system detects the change and adjusts the inductor current immediately, preventing delayed response while still enabling power savings during light load conditions through controlled pulse skipping.

Inventive Principle:
Principle #23Feedback

3Loss of energy

If the DC-DC converter transitions from normal mode to pulse skip mode, then power consumption decreases, but voltage instability occurs during the transition

Engineering Contradiction:
Improvepower consumptionVSAvoidoutput voltage stability
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by preparing the pulse skip reference voltage in advance during the reference on-time before mode transitions. The reference voltage is sampled and stored in the capacitor during normal operation, so when transitioning to pulse skip mode, the error amplifier immediately has a valid reference voltage to compare against, preventing voltage instability. This ensures smooth mode transitions while maintaining power savings during light load conditions.

Inventive Principle:
Principle #10Preliminary action

4Device complexity

If the DC-DC converter uses a simple pulse skip control without reference voltage sampling, then device complexity is reduced, but voltage overshoot or undershoot occurs during mode transitions

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidoutput voltage stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent uses an intermediary approach by introducing a capacitor to store the pulse skip reference voltage and a sensing circuit to generate the reference voltage based on inductor current. This intermediary mechanism allows the system to maintain a valid reference voltage during mode transitions without requiring complex control logic. The capacitor acts as a buffer that holds the reference voltage, enabling simple comparison by the error amplifier while ensuring stable output voltage during transitions from pulse skip mode to normal mode.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250343484A1DC-DC converter
Publication Date: 2025.11.06 SAMSUNG ELECTRONICS CO LTD
  • US20250343484A1 patent drawing
  • US20250343484A1 patent drawing
  • US20250343484A1 patent drawing

AI summary

A direct current (DC)-DC converter including: a voltage conversion circuit that includes an inductor and an output capacitor, and converts an input voltage and to produce an output voltage; a current detection circuit that detects an inductor current and generates a sensing current during an on-time, energizing the inductor current flowing through the inductor; a pulse skip reference voltage generation circuit that generates a sensing voltage and a pulse skip reference voltage using the sensing current; and a control circuit that determines whether to skip a pulse of the voltage conversion circuit and controls the on-time, using the sensing voltage, the pulse skip reference voltage, and a feedback voltage proportional to the output voltage, wherein the pulse skip reference voltage generation circuit generates the pulse skip reference voltage by sampling the sensing voltage during a reference on-time.