Step-Up/Step-Down DC/DC PWM Control With Adaptive Ramp Voltage
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Solution Overview
Problem
Existing step-up/step-down DC/DC converters face challenges in efficiently switching between modes of operation efficiency and stability, particularly in adjusting output voltage in response to changes in input voltage and clock signal frequency.
Innovation Solution
A controller circuit with an integrated solution for a step-up/step-down DC/DC converter that includes a ramp voltage generation circuit with synchronized ramp voltage generators, a middle voltage generation circuit, and a phase adjustment circuit to stabilize PWM control, using a first and a second comparator to stabilize PWM signals, and a logic circuit to control transistor operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a step-up/step-down DC/DC converter is used to adjust output voltage in response to input voltage changes, then voltage adaptability is improved, but PWM control stability deteriorates when clock signal frequency changes
Solution Approach 1:
The patent applies dynamics by making the ramp voltage generation adaptive to clock frequency changes. The ramp voltage generation circuit dynamically adjusts its characteristics based on the actual clock signal frequency, allowing the PWM control to remain stable across different operating conditions while maintaining voltage adaptability.
Solution Approach 2:
The patent changes the parameter of ramp voltage to compensate for clock frequency variations. By adjusting the ramp voltage characteristics in response to frequency changes, the system maintains stable PWM control while preserving the ability to adapt output voltage to input voltage changes.
2Ease of operation
If ramp voltage generation is used for PWM control, then switching control is simplified, but PWM signal stability deteriorates when clock frequency varies
Solution Approach 1:
The patent introduces feedback by detecting the actual clock signal frequency and using this information to adjust the ramp voltage generation. This feedback mechanism ensures that PWM signals remain stable even when clock frequency varies, while keeping the switching control simple through automatic adaptation.
Solution Approach 2:
The ramp voltage generation is made dynamic by automatically adjusting to clock frequency changes. This dynamic adaptation maintains PWM signal stability without complicating the switching control, as the adjustment occurs automatically based on detected frequency variations.
3Device complexity
If fixed ramp voltage is used for PWM generation, then circuit design is simplified, but control accuracy deteriorates when operating conditions change
Solution Approach 1:
The patent transitions from fixed to dynamic ramp voltage generation that adapts to operating conditions. This dynamic approach improves control accuracy by compensating for frequency variations while adding minimal complexity through automatic adaptation mechanisms.
Solution Approach 2:
The ramp voltage generation circuit serves itself by automatically detecting clock frequency and adjusting its own characteristics. This self-service mechanism improves control accuracy under varying conditions without requiring complex external control circuits.
Data Source
AI summary
A controller circuit for a step-up/step-down DC/DC converter generating an output voltage according to an input voltage includes: step-down and step-up switch circuits respectively including high-side and low-side transistors and respectively receiving the input voltage and outputting the output voltage; ramp voltage and middle voltage generation circuits respectively generating a ramp voltage based on a first clock signal and a middle voltage of the ramp voltage; an error amplifier circuit generating an error signal from an error between a feedback voltage of the output voltage and a reference voltage; an inverting amplifier generating an inverted signal by inverting the error signal based on the middle voltage; first and second comparators generating first and second PWM signals by respectively comparing the ramp voltage with the error and inverted signals; and a logic circuit generating a control signal for the high-side and low-side transistors based on the first and second PWM signals.