DC-DC Converter Control Loop for Fast Voltage Tracking Stability

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Solution Overview

Problem

Existing DC-DC converters in radio frequency front-end modules with automatic power tracking mode suffer from low response speed and stability issues due to high loop bandwidth, leading to inefficiency and potential oscillation, which is critical for 5G communication systems.

Innovation Solution

A DC-DC converter with a power-stage circuit and control loop unit that uses weighted superposition of power supply voltage, sampled voltage, and controllable reference voltage to form a slope compensation voltage, combined with FPWM/FCCM logic control, to manage the turn-on time of transistors for rapid output voltage tracking without extending the loop bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the loop bandwidth of the DC-DC converter is increased to satisfy response speed requirements, then the response speed improves, but the stability of the loop deteriorates and the converter becomes more sensitive to noise

Engineering Contradiction:
Improveresponse speedVSAvoidloop stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The control loop is segmented into two independent paths: a fast path using slope compensation voltage for rapid response, and a slow path using error amplifier for stability. This segmentation allows each path to be optimized for its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The slope compensation voltage acts as an intermediary signal that directly influences the PWM duty cycle without passing through the error amplifier. This intermediary mechanism provides rapid response while the error amplifier maintains long-term stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the error amplifier consumes more quiescent currents to ensure sufficient bandwidth, then the response speed improves, but the efficiency of the DC-DC converter is reduced

Engineering Contradiction:
Improveresponse speedVSAvoidconverter efficiency
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The control function is segmented between the slope compensation path and error amplifier path, allowing the error amplifier to operate at lower bandwidth and consume less quiescent current while the fast path handles rapid transient responses.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The slope compensation voltage is generated in advance based on the switching frequency and inductor current, providing preemptive control that reduces the burden on the error amplifier and allows it to operate more efficiently.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If a conventional voltage-mode structure is used, then the circuit implementation is simple, but the output voltage cannot achieve rapid tracking of transmission power in APT mode

Engineering Contradiction:
Improvecircuit implementation simplicityVSAvoidvoltage tracking speed
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The patent merges conventional voltage-mode control with current-mode slope compensation techniques. The control loop unit generates both slope compensation voltage and error amplifier output, combining the simplicity of voltage-mode with the rapid response of current-mode control.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control system dynamically adjusts the PWM duty cycle based on the combined signal from slope compensation voltage and error amplifier output, enabling rapid tracking of transmission power requirements while maintaining circuit simplicity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4701060A1DC-DC converter, chip, and electronic device
Publication Date: 2026.02.25 VANCHIP TIANJIN TECH
  • EP4701060A1 patent drawingFigure 1(a)~1(b)
  • EP4701060A1 patent drawingFigure 2
  • EP4701060A1 patent drawingFigure 3~4

AI summary

Disclosed in the present invention are a DC-DC converter, a chip, and a corresponding electronic device. The DC-DC converter comprises a power-stage circuit unit and a control loop unit, wherein a control signal output end of a baseband is connected to an input end of the control loop unit, a control signal output end of the control loop unit is connected to a corresponding input end of the power-stage circuit unit, and a sampling voltage output end of the power-stage circuit unit is connected to the corresponding input end of the control loop unit, so as to form a closed control loop. With regard to the DC-DC converter, in a control loop unit, by means of the technical solution of performing weighted superposition on a power source voltage, a sampling voltage, a controllable reference voltage and a fixed current to form a slope compensation voltage, and the technical solution of FPWM/FCCM logic control, fast tracking of an output voltage of the DC-DC converter in respect of a transmission power is realized, such that the efficiency is ensured, and a transient conversion response speed of the output voltage is also greatly increased.