DC-DC Converter Timing Control for High-Side ZVS Detection

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Solution Overview

Problem

Existing DC-DC converter circuits face challenges in achieving zero voltage switching (ZVS) due to high-side switch voltage measurement requirements, which necessitate high voltage comparators with slow response times and high power consumption, or additional circuitry that is costly and power-intensive.

Innovation Solution

A comparator circuit referenced to the switching node, clocked to sample the high-side switch voltage and generate a level-shifted signal for the control circuit, allowing selective adjustment of the delay time between low-side and high-side switch operations to facilitate ZVS, using low voltage components and a low-power level shifter.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high voltage comparators are used to measure high-side switch voltage for zero voltage switching detection, then measurement capability is achieved, but response time becomes slow and power consumption increases

Engineering Contradiction:
Improvehigh-side switch voltage measurement capabilityVSAvoidcomparator response time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent introduces an intermediary voltage divider circuit that scales down the high voltage at the high-side switch to a lower voltage suitable for comparison by a low-voltage comparator. This intermediary device enables the comparator to indirectly measure the high-side switch voltage without being directly exposed to high voltage, thereby achieving fast response time and low power consumption while maintaining measurement capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a scaled-down copy of the high-side switch voltage through the voltage divider circuit. Instead of directly comparing the original high voltage, the comparator compares this scaled copy, which contains the same voltage polarity information but at a safe, low voltage level that enables fast and power-efficient operation

Inventive Principle:
Principle #26Copying

2Measurement precision

If voltage dividers are used to reduce detected signal voltage, then low voltage components can be used, but large voltage divider components are required and power consumption increases

Engineering Contradiction:
Improvevoltage detection capabilityVSAvoidvoltage divider power consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent employs periodic action by enabling the voltage divider circuit only during the brief interval when the switching node resonates toward the input rail voltage after the low-side device turns off. The comparator is activated only during this specific time window to detect zero voltage switching conditions, rather than operating continuously, thereby significantly reducing power consumption while maintaining accurate voltage detection capability

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements preliminary action by pre-configuring the voltage divider circuit with appropriate component values before operation, and by pre-synchronizing the comparator activation with the switching node resonance timing. This ensures that the voltage division ratio is optimally set beforehand and the comparator is ready to detect ZVS conditions immediately when they occur, eliminating the need for continuous operation

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If continuous time comparators operate at high speed for fast ZVS detection, then response time is reduced, but power consumption becomes high

Engineering Contradiction:
Improvepropagation delayVSAvoidcomparator power consumption
Core Design Contradiction:
Loss of timeVSUse of energy by stationary object

Solution Approach 1:

The patent applies periodic action by transforming the comparator from a continuous-time, always-on device to a periodically activated device. The comparator is synchronized to operate only during the brief resonance interval of the switching node, performing fast ZVS detection when needed, then entering a low-power standby state. This periodic operation maintains fast response capability while dramatically reducing average power consumption compared to continuous high-speed operation

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient zero voltage switching with reduced power consumption and circuit complexity, allowing for fast response times and accurate ZVS control without the need for high-voltage comparators or large voltage dividers.

Implementation Method 1

A comparator circuit compares the voltages across the high-side switching device, and is referenced to the switching node to allow use of low voltage components

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 2

The comparator circuit is clocked according to an edge of a signal that turns the high-side driver on to sample the voltage across the high-side switch

Methodology Applied
Scientific EffectClocked sampling:

Implementation Method 3

The comparator circuit includes a level shift circuit to receive the comparator signal from the clocked comparator and to provide a level shifted comparator signal to the control circuit

Methodology Applied
Scientific EffectVoltage level shifting:

Data Source

PatentEP3443657B1DC-DC converter and control circuit
Publication Date: 2023.09.13 TEXAS INSTRUMENTS INC
  • EP3443657B1 patent drawingFigure 1
  • EP3443657B1 patent drawingFigure 2~3
  • EP3443657B1 patent drawingFigure 4

AI summary

In described examples, DC-DC converters (100) and control circuits (101) provide high and low-side driver signals (HSD, LSD) and selectively adjust a delay time between a low-side switching device (S2) turning off and a high-side switching device (SI) turning on according to a comparator signal (CMP). A clocked comparator circuit (130) is referenced to a switching node (104) to sample the voltage across the high-side switching device (SI) in response to a first edge of the high-side driver signal (HSD), and to generate the comparator signal (CMP) indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching (ZVS) of the high-side switching device (SI).