DCE Memory Controller Embedded Logic for Data Migration

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Solution Overview

Problem

Current data storage systems, particularly RAID engines, rely on expensive CPUs or GPUs for performing computations, leading to bottlenecks in data migration and increased power consumption, as they require data buffering and fast memory interfaces, making them complex and costly.

Innovation Solution

A data storage system employing a Distributed Compute Engine (DCE) memory controller with embedded logic and arithmetic functionality, integrated with FPGA technology, performs Boolean logic and arithmetic operations directly within the memory controller, eliminating the need for CPU/GPU processing and enabling zero-copy compute operations through PCIe switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If CPU or GPU is used for performing computations in data storage systems, then computational capability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvecomputational capabilityVSAvoidsystem complexity
Core Design Contradiction:
Extent of automationVSDevice complexity

Solution Approach 1:

The patent extracts the computational functionality from the CPU/GPU and relocates it to the memory controller. The memory controller is enhanced with embedded logic and arithmetic units that can perform Boolean logic operations (AND, OR, NOT, XOR, NAND, NOR) and arithmetic operations (ADD, SUBTRACT, MULTIPLY, DIVIDE) directly on data stored in memory, eliminating the need for data buffering and complex CPU involvement.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary computational layer between the CPU and memory. The enhanced memory controller acts as a mediator that performs computations on data while it resides in memory, using embedded logic units and arithmetic circuits. This intermediary approach allows CPU to offload computational tasks without requiring direct CPU-GPU involvement in every operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If CPU or GPU is used for data processing, then computation speed is improved, but power consumption increases

Engineering Contradiction:
Improvecomputation speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by placing computational resources exactly where they are needed - within the memory controller at the location of data storage. The embedded logic and arithmetic units in the memory controller perform computations locally on data while it resides in memory, eliminating the need to move data to CPU/GPU for processing. This local computation approach reduces both power consumption and energy transfer requirements.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If data buffering is implemented in CPU memory, then computation accuracy is improved, but loss of time increases

Engineering Contradiction:
Improvecomputation accuracyVSAvoiddata migration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing computations on data while it is already resident in memory, before any data migration or buffering to CPU memory is required. The embedded computational units in the memory controller process data in-place, eliminating the need for preliminary data buffering in CPU memory and the subsequent time-consuming data transfer operations.

Inventive Principle:
Principle #10Preliminary action

4Speed

If fast memory interfaces are used for CPU data access, then data access speed is improved, but device complexity increases

Engineering Contradiction:
Improvedata access speedVSAvoidmemory interface complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the computational functions with the memory controller, combining logic units, arithmetic circuits, and memory management capabilities into a single integrated component. This consolidation eliminates the need for separate fast memory interfaces and complex data transfer pathways between CPU and memory, as computations are performed directly where data is stored.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9092152B1Data storage system employing a distributed compute engine memory controller with embedded logic and arithmetic functionality and method for data migration between high-performance computing architectures and data storage devices using the same
Publication Date: 2015.07.28 DATADIRECT NETWORKS INC
  • US9092152B1 patent drawing
  • US9092152B1 patent drawing
  • US9092152B1 patent drawing

AI summary

Distributed Compute Engine (DCE) memory controller in a data storage environment contains embedded logic and arithmetic functionality for Boolean logical and arithmetic operations. “Write” or “Read” requests which are received from data generating entities, contain a Physical Address field identifying an address of a data block to be retrieved from the external memory, and a Control bits field identifying a type of computational operation to be performed. The DCE memory controller decodes the request, and applies the desired compute operation autonomically to the contents of an external memory and/or the incoming data without burdening the CPU with the computational activity.