DCO Capacitor Bank Segmentation for Binary Error Compensation

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Solution Overview

Problem

Binary weighted designs in digitally controlled oscillators (DCOs) suffer from non-linearity due to process variations, leading to phase errors in frequency output, which existing technologies have not adequately addressed.

Innovation Solution

A segmentation superposition module is introduced to measure and compensate for non-linearity in the capacitor bank of DCOs by generating compensation vectors based on silicon measurements, which are stored in a lookup table and used to adjust the frequency control signal, thereby reducing binary errors and achieving a more linear frequency output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a binary weighted design is used for the capacitor tuning bank, then the layout becomes more compact, but non-linearity occurs due to process variations causing phase errors

Engineering Contradiction:
Improvelayout areaVSAvoidfrequency linearity
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The capacitor tuning bank is divided into multiple segments or groups, where each segment contains capacitors with specific binary weights. This segmentation allows the system to maintain the compact binary weighted layout while introducing redundancy that can be used for error compensation through selective activation of segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the operational parameters by introducing compensation codes that adjust the effective capacitance values. These compensation codes modify the binary weighted activation pattern to counteract process variations, thereby correcting frequency linearity errors while maintaining the compact binary layout structure.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If a binary weighted design is used for the capacitor tuning bank, then the layout becomes more compact, but phase errors occur in the DCO output

Engineering Contradiction:
Improvelayout areaVSAvoidphase accuracy
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The system implements feedback by measuring the actual phase output and comparing it with the desired phase. Based on this comparison, compensation codes are generated and applied to adjust the capacitor bank activation, thereby correcting phase errors in real-time while maintaining the compact binary weighted architecture.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The invention applies preliminary action by pre-calculating and storing compensation codes that anticipate and counteract expected phase errors from process variations. These compensation codes are applied in advance or concurrently with the main frequency control signal to prevent phase errors before they affect output accuracy.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If compensation vectors are generated and applied to correct non-linearity, then frequency linearity improves, but device complexity increases

Engineering Contradiction:
Improvefrequency linearityVSAvoidcontrol signal processing
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Compensation codes are pre-calculated and stored in lookup tables during manufacturing or initialization. This preliminary action eliminates the need for complex real-time calculations, reducing the computational burden and device complexity while maintaining improved frequency linearity through straightforward code application.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention uses copying by storing pre-computed compensation codes in lookup tables. Instead of performing complex real-time error calculations, the system copies the appropriate compensation code from the lookup table based on the operating conditions and applies it, significantly simplifying the control signal processing while maintaining frequency linearity correction.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10666267B2Segmentation superposition technique for binary error compensation
Publication Date: 2020.05.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10666267B2 patent drawing
  • US10666267B2 patent drawing
  • US10666267B2 patent drawing

AI summary

Systems and methods for compensating a non-linearity of a digitally controlled oscillator (DCO) are presented. Data comprising a plurality of silicon measurements is received. Each silicon measurement in the plurality of silicon measurements is compared to an ideal value. Based on the comparing, a plurality of compensation vectors is generated. Each compensation vector comprises at least one silicon measurement. At least one frequency is adjusted based on a compensation vector in the plurality of compensation vectors. A digitally-controlled oscillator frequency is generated based on the adjusted at least one frequency.