Don't Care Set Propagation in FPGA Synthesis Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current electronic design automation (EDA) tools for field programmable gate arrays (FPGAs) inefficiently utilize Don't Care Sets (DCSs) information, which is typically discarded after initial optimization, limiting their effectiveness in subsequent synthesis stages and routing processes.
Innovation Solution
The method involves utilizing DCSs for optimization throughout multiple stages of synthesis after register transfer level (RTL) conversion, propagating signal realization sets for continued optimization, and allowing EDA tools to identify or specify DCSs from user input or simulation results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If DCS information is used only during early stage synthesis and then discarded, then the synthesis process is simpler and faster, but the optimization effectiveness is limited and resource allocation is suboptimal
Solution Approach 1:
The patent performs preliminary identification and storage of DCS information during early synthesis stages, preparing optimization data in advance so it can be reused throughout the entire synthesis flow without recomputing, thus maintaining speed while enabling continuous optimization benefits
Solution Approach 2:
The patent maintains DCS information throughout the entire synthesis process rather than discarding it after initial use, allowing continuous optimization benefits across multiple synthesis stages including placement and routing, thereby improving overall optimization effectiveness without significantly increasing computational burden
2Manufacturing precision
If DCS information is propagated and reused across multiple synthesis stages, then optimization effectiveness and resource allocation improve, but the complexity and computational overhead of the synthesis process increases
Solution Approach 1:
The patent creates and propagates copies of DCS information through the synthesis flow, allowing the same optimization data to be used at multiple stages without requiring complex recomputation or analysis at each stage, thus reducing the actual computational overhead despite the increased information propagation
Solution Approach 2:
The patent develops a unified DCS representation and propagation mechanism that serves multiple synthesis stages (synthesis, placement, routing) with a single data structure and set of algorithms, reducing overall process complexity by avoiding stage-specific optimization routines
3Ease of manufacture
If DCS information is discarded after initial optimization, then the synthesis process is more straightforward and easier to implement, but placement and routing efficiency is reduced
Solution Approach 1:
The patent performs preliminary DCS identification and propagates it through the synthesis flow in advance, so that placement and routing stages can directly utilize the pre-computed optimization information without performing complex analysis, thus maintaining implementation simplicity while improving placement and routing efficiency
Data Source
AI summary
A method for designing a system on a target device includes determining a realization set of a signal that includes one or more representations of the signal where at least one of the representation is influenced by a Don't Care Set (DCS) and all representations are equivalent. The realization set is propagated through the system with the signal. The realization set is used to perform a plurality of separate optimizations on the logic.