DD-MOSFET Drift Region Segmentation for AMOLED Driver ICs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-end semiconductor technologies face limitations in forming a MOSFET structure suitable for driver ICs, particularly for AMOLED displays, due to constraints on the length of the LDD region, leading to increased bulk current, electric field concentration, and degraded Hot Carrier Immunity (HCl) characteristics, which affect the transistor's ability to maintain flatness in drain voltage-drain current characteristics and snapback performance.
Innovation Solution
A semiconductor device with a WELL region, a gate electrode, and drift regions of low doping concentration that overlap with the gate, allowing for a controlled overlapping length and doping concentration to reduce bulk current and enhance Hot Carrier Immunity, while maintaining high integration and reliability, by forming a DD-MOSFET structure with a polysilicon gate conductive film and optimizing the length and depth of the drift regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If ion implantation with higher energy is implemented to form laterally extended LDD region, then the LDD region length is increased, but implanted dopants penetrate into the semiconductor region under the gate electrode causing the transistor to lose MOSFET functionality
Solution Approach 1:
The drift region is divided into two separate regions: a first drift region formed before the gate electrode and a second drift region formed after the gate electrode. This segmentation allows each region to be formed with controlled doping that prevents penetration under the gate while achieving the desired total drift region length for low bulk current.
Solution Approach 2:
The first drift region is formed preliminarily before forming the gate electrode, allowing the gate to be formed with proper spacing from the doped region. This preliminary action enables subsequent formation of the second drift region without risking gate penetration, as the gate structure is already in place to define the boundary.
2Productivity
If the LDD spacer thickness is reduced for large scale integration, then device integration density is improved, but the electric field increases and bulk current increases degrading HCl characteristics
Solution Approach 1:
By segmenting the drift region into two parts formed at different stages, the invention achieves effective drift region extension without requiring thick spacers. The first drift region provides the necessary spacing control, while the second drift region extends the low-doping region further without increasing spacer thickness, thus maintaining integration density while reducing bulk current.
Solution Approach 2:
The invention changes the doping concentration parameter in the drift regions to be lower than conventional LDD regions. This parameter change reduces the bulk current and electric field intensity, improving HCl characteristics while maintaining the compact structure needed for large scale integration.
3Device complexity
If the LDD region length is insufficient, then device structure simplicity is maintained, but electric field concentration at the drain increases causing large bulk current and degraded HCl characteristics
Solution Approach 1:
The drift region is segmented into two formation stages, which appears complex but actually provides precise control over the drift region extension. This controlled extension reduces electric field concentration at the drain without requiring overly complex multi-layer structures, achieving a balance between structural simplicity and HCl performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces bulk current, improves Hot Carrier Immunity, and maintains flatness in drain voltage-drain current characteristics, enabling stable operation of MOSFETs in driver ICs for AMOLED displays by optimizing the drift region's length and doping concentration, thus addressing the limitations of high-end technologies.
Implementation Method 1
drift regions of low doping concentration that overlap with the gate
Data Source
AI summary
A semiconductor device includes a substrate comprising a WELL region, a gate electrode comprising a gate length disposed on the WELL region, and first and second drift regions which overlap with the gate electrode. The first and second draft regions may overlap with the gate electrode at an overlapping length which is a percentage of the gate length.