Double Diffusion Break Connection Layout for Denser IC Routing

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Solution Overview

Problem

Conventional semiconductor IC devices face challenges in maintaining switching speeds and reducing current leakage as device dimensions shrink, and forming effective isolation regions becomes difficult due to increased packing densities and reduced plot space.

Innovation Solution

The introduction of a dual diffusion break region with a conductive through device connection, utilizing a faux source/drain region and mirrored structures, reduces routing complexities and resistance, and increases packing densities by leveraging unused plot space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional isolation regions (trenches filled with insulating material) are formed to electrically isolate transistors, then electrical isolation between devices is achieved, but valuable plot space is consumed and packing density is reduced

Engineering Contradiction:
Improveelectrical isolationVSAvoidplot space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the isolation function from the traditional trench structure and relocates it to the diffusion break region. By forming the conductive through-device connection within the diffusion break rather than requiring a separate trench, the isolation function is achieved without consuming additional plot space, thus resolving the contradiction between electrical isolation and plot space utilization

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The diffusion break region is given multiple functions: it provides electrical isolation between adjacent active regions while simultaneously housing the conductive through-device connection. This multi-functionality eliminates the need for separate isolation trenches, thereby preserving plot space while maintaining electrical isolation

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If device dimensions are shrunk to increase packing density, then more devices fit on the chip, but current leakage increases and switching speeds deteriorate

Engineering Contradiction:
Improvepacking densityVSAvoidcurrent leakage control
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by creating a specifically doped diffusion break region with distinct electrical properties. The diffusion break is doped to form a conductive path that is localized and controlled, providing effective current blocking at the isolation regions while maintaining high packing density through the integrated through-device connection

Inventive Principle:
Principle #3Local quality

3Reliability

If conventional routing paths are used for through-device connections, then electrical connections are established, but routing complexities and resistance increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidrouting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the isolation structure with the connection structure by placing the conductive through-device connection directly within the diffusion break region. This integration eliminates the need for separate routing paths through multiple layers, thereby reducing routing complexity and resistance while establishing reliable electrical connections

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240404944A1Frontside to backside connection within double diffusion break
Publication Date: 2024.12.05 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240404944A1 patent drawing
  • US20240404944A1 patent drawing
  • US20240404944A1 patent drawing

AI summary

A semiconductor IC device includes a conductive through device connection. The connection may be located within a double diffusion break (DDB) region that separates active regions. The connection may include a faux S/D region between a frontside contact and a backside contact. The semiconductor IC device may further include a first and/or second diffusion break isolation rail. The connection may be between the first and second diffusion break isolation rails. The connection location within the DDB region may resultantly increase packing densities of the semiconductor IC device. Further, the connection may reduce routing complexities and resistance through the semiconductor IC device, which may improve semiconductor IC device performance. Further, the connection may utilize mirrored structure instances (e.g., frontside contact, backside contact, faux S/D region, or the like) as that are used by microdevices (e.g., transistors, or the like) within the active regions, which may decrease fabrication complexities.