Deeply Depleted Channel Transistor Threshold Voltage Control
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Solution Overview
Problem
The variation in threshold voltage of transistors due to random dopant fluctuations limits the design flexibility of semiconductor chips, particularly as critical dimensions shrink, leading to increased leakage power and reduced speed in integrated circuits.
Innovation Solution
The use of Deeply Depleted Channel (DDC) transistors with dual screening regions and a substantially undoped channel allows for precise setting of threshold voltage, reducing dopant migration and leakage current, and enabling the fabrication of multiple transistor types with varying threshold voltages without the need for pocket or halo implants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If channel doping or halo implants are used to set threshold voltage, then threshold voltage can be controlled, but random dopant fluctuations increase causing threshold voltage variation
Solution Approach 1:
The patent extracts the dopant-containing screening region from direct contact with the channel, separating the threshold voltage control function from the channel region. The screening region is positioned adjacent to but separated from the channel by a barrier, eliminating random dopant fluctuations in the channel while maintaining threshold voltage control through the screening region's dopant profile.
Solution Approach 2:
The patent introduces a barrier as an intermediary element between the doped screening region and the channel. This barrier mediates the interaction by allowing electric field coupling for threshold voltage control while preventing direct dopant contact with the channel, thus eliminating random dopant fluctuations.
2Productivity
If critical dimensions are scaled down to increase transistor density, then device integration improves, but threshold voltage variation increases due to greater impact of dopant fluctuations
Solution Approach 1:
By extracting dopants from the channel region into a separate screening region, the patent eliminates the source of random dopant fluctuations that become increasingly problematic as device dimensions shrink. This allows continued scaling while maintaining consistent threshold voltage.
Solution Approach 2:
The patent applies local quality by creating a highly doped screening region in one location while keeping the channel region substantially undoped. This localized dopant concentration allows precise threshold voltage control without introducing random fluctuations into the channel, enabling reliable scaling.
3Speed
If low threshold voltage devices are used for high speed circuits, then switching speed improves, but leakage power increases
Solution Approach 1:
The patent enables dynamic threshold voltage control by applying different voltages to the screening region. By dynamically adjusting the screening region voltage, the threshold voltage can be optimized for different operating conditions - lower for high-speed operation and higher for low-power standby mode.
Solution Approach 2:
The patent changes the electrical parameter of the screening region (voltage potential) to control the threshold voltage. By varying the screening region voltage, the threshold voltage can be adjusted to optimize the trade-off between switching speed and leakage power based on circuit requirements.
Data Source
AI summary
A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.


