DDC Analog Transistors for Threshold Voltage Matching
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Solution Overview
Problem
Conventional analog circuits suffer from variability in threshold voltage due to random dopant fluctuations, leading to inconsistent performance and reduced accuracy in generating analog values.
Innovation Solution
The use of deeply depleted channel (DDC) transistors with a highly doped screening layer and an undoped channel region, which reduces channel random dopant fluctuations and allows for finer adjustment of threshold voltage through a threshold voltage set layer, improving matching of device characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transistors with doped channels are used, then manufacturing is easier, but threshold voltage variability increases due to random dopant fluctuations
Solution Approach 1:
The patent changes the doping parameter from conventional uniform doping to a graded doping profile with a highly doped screening layer at the interface and a lightly doped bulk. This parameter change reduces random dopant fluctuations in the channel while maintaining manufacturability through controlled doping gradients.
Solution Approach 2:
The transistor structure uses a composite doping configuration with two distinct doped regions: a heavily doped screening layer (10^19 to 10^21 atoms/cm³) and a lightly doped bulk (10^16 to 10^18 atoms/cm³). This composite approach combines the benefits of high doping (threshold voltage control) with low doping (reduced fluctuations) in different spatial zones.
2Manufacturing precision
If standard transistors are used, then device structure is simpler, but matching of device characteristics deteriorates
Solution Approach 1:
The patent applies local quality by creating a non-uniform doping distribution where the screening layer has high doping concentration specifically at the semiconductor-gate insulator interface, while the bulk remains lightly doped. This localized high doping improves threshold voltage control and device matching without requiring complex overall structure changes.
3Measurement precision
If conventional transistors are used, then power consumption may be lower, but analog circuit accuracy decreases due to variability
Solution Approach 1:
The patent uses current mirror circuits that copy reference currents to generate precise analog output currents. The improved transistor matching enabled by the graded doping structure ensures that the copied currents maintain high precision, achieving accurate analog generation without requiring excessive power for correction circuits.
Data Source
AI summary
Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.


