DDFS FM Signal Generation Using a Shared RFID PLL Clock

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Solution Overview

Problem

Integrating FM transmission, FM reception, and RFID capabilities into portable electronic devices like wireless handsets is costly and inefficient, leading to increased power consumption due to the need for separate processing hardware and software, and requires sophisticated power management to maximize battery life.

Innovation Solution

A system and method for transmitting and receiving FM signals using a Direct Digital Frequency Synthesizer (DDFS) clocked by an RFID Phase-Locked Loop (PLL), which shares frequency synthesizer resources between FM and RFID functions, enabling simultaneous operation and reducing power consumption by switching between transmit and receive frequencies using a control word.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate processing hardware and software are used for FM radio and RFID services, then functional capability is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvefunctional capabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal frequency synthesizer that serves both FM radio and RFID functions. The phase-locked loop (PLL) and frequency synthesizer circuitry are shared between the two radio systems, allowing a single hardware block to perform multiple functions. This eliminates the need for separate frequency synthesis hardware for FM and RFID, directly reducing device complexity while maintaining full functional capability for both services.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the frequency synthesis functions of FM radio and RFID into a single integrated circuit block. The phase detector, charge pump, voltage-controlled oscillator (VCO), and frequency synthesizer are combined into one shared resource that can be dynamically configured for either FM or RFID operation through software control, thereby reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If separate processing hardware is used for FM radio and RFID services, then functional capability is improved, but power consumption increases

Engineering Contradiction:
Improvefunctional capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The shared frequency synthesizer enables both FM radio and RFID services to utilize the same power-consuming circuitry. By making the frequency synthesis function universal, the patent ensures that only one instance of this high-power component needs to operate at any given time, significantly reducing total power consumption compared to having separate synthesizers for each service while maintaining full adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs time-division multiplexing where the shared frequency synthesizer is activated periodically based on the operational requirements of FM or RFID services. The system dynamically switches between services, activating the frequency synthesizer only when needed for either FM reception/transmission or RFID communication, thereby reducing overall power consumption through periodic rather than continuous operation.

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If shared frequency synthesizer resources are used, then power consumption is reduced, but signal transmission precision may be affected

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal transmission precision
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent implements a phase-locked loop (PLL) with feedback control that continuously monitors and adjusts the frequency synthesizer output. The phase detector compares the synthesized frequency with a reference, and the feedback mechanism corrects any deviations, ensuring high frequency precision for both FM and RFID signals even though the synthesizer is shared between services. This feedback control maintains signal transmission precision while enabling power-efficient sharing.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs a dynamic frequency synthesizer that can rapidly switch between different frequency ranges and modulation schemes required by FM radio and RFID services. The voltage-controlled oscillator (VCO) and associated circuitry are designed to dynamically adjust their operating parameters under software control, maintaining precise frequency synthesis performance across different service requirements while enabling efficient resource sharing.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for efficient integration of FM and RFID capabilities in a single device, reducing power consumption and hardware requirements while maintaining simultaneous transmission and reception capabilities, thereby extending battery life and simplifying power management.

Implementation Method 1

A system and method for transmitting and receiving FM signals using a Direct Digital Frequency Synthesizer (DDFS) clocked by an RFID Phase-Locked Loop (PLL)

Methodology Applied
Scientific EffectPhase-Locked Loop:

Data Source

PatentUS7920893B2Method and system for transmission or reception of FM signals utilizing a DDFS clocked by an RFID PLL
Publication Date: 2011.04.05 NXP USA INC
  • US7920893B2 patent drawing
  • US7920893B2 patent drawing
  • US7920893B2 patent drawing

AI summary

Aspects of a method and system for transmission or reception of FM signals utilizing a DDFS clocked by an RFID PLL are provided. In this regard, one or more signals utilized to transmit or receive FM communication may be generated by clocking a DDFS via a signal generated to enable RFID communication. The DDFS may be controlled via a control word from a processor. In this regard, the control word may determine a frequency and/or phase of the signals output by the DDFS. The control word may be switched between two or more values to generate different frequencies and/or phases in different time intervals. Additionally, the control word may be adjusted to maintain a constant phase and/or frequency in spite of changes to the signal clocking the DDFS.