Display Driving IC Frequency Tracking for OLED Panel Synchronization

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Solution Overview

Problem

In OLED panel systems with multiple display areas, ensuring consistent internal clock frequencies across different driving integrated circuits is crucial for maintaining image quality, but existing methods lack a reliable mechanism for frequency synchronization between independent driving circuits.

Innovation Solution

The implementation of a frequency tracking operation within the display driving integrated circuit, where one circuit generates a tracked internal clock signal by selectively using a display synchronization signal from another circuit, ensuring frequency consistency across all circuits driving the OLED panel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple independent driving integrated circuits are used to drive different display areas, then the display device can support multiple display modes (dual-screen, triple-screen, etc.), but the internal clock frequencies of different driving integrated circuits may be inconsistent, affecting image quality

Engineering Contradiction:
Improvedisplay mode adaptabilityVSAvoidimage quality consistency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the first driving integrated circuit transmits its internal clock signal to the second driving integrated circuit. The second circuit receives this signal and adjusts its own internal clock frequency to match the first circuit's frequency, ensuring consistent image quality across multiple display areas while maintaining support for various display modes.

Inventive Principle:
Principle #23Feedback

2Ease of operation

If each driving integrated circuit uses its own independent internal clock, then the device operation is independent and flexible, but the clock frequency consistency between circuits cannot be guaranteed

Engineering Contradiction:
Improveindependent circuit operationVSAvoidclock frequency consistency
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary mechanism where the first driving integrated circuit's internal clock signal serves as a reference for the second circuit. Through the clock signal transmission interface, the second circuit adjusts its clock frequency based on the received signal, achieving frequency consistency while preserving independent operation capability of each circuit.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the internal clock frequencies of different driving integrated circuits are made consistent, then image quality is improved, but additional circuit connections and frequency adjustment mechanisms are required

Engineering Contradiction:
Improveimage qualityVSAvoidcircuit connection complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the clock synchronization function into the existing communication interface between driving integrated circuits. By utilizing the available signal transmission pathway to carry clock frequency reference information, the patent achieves frequency consistency without requiring separate dedicated synchronization hardware, thus minimizing additional circuit complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11915666B2Display device, display driving integrated circuit, and operation method
Publication Date: 2024.02.27 NOVATEK MICROELECTRONICS CORP
  • US11915666B2 patent drawing
  • US11915666B2 patent drawing
  • US11915666B2 patent drawing

AI summary

A display device, a display driving integrated circuit (DDIC), and an operation method are provided. The display device includes a display panel, a first DDIC, and a second DDIC. The first DDIC generates a display synchronization signal, and drives a first display area of a display panel according to the display synchronization signal. The second DDIC is coupled to the first DDIC to receive the display synchronization signal. The second DDIC performs a frequency tracking operation on an internal clock signal of the second DDIC by selectively using the display synchronization signal. The second DDIC drives a second display area of the display panel according to the internal clock signal and the display synchronization signal.