Dynamic Digital Predistortion for Fast-Changing PA Nonlinearity

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Solution Overview

Problem

Current power amplifiers in 3G cellular communication systems suffer from low efficiency due to non-linear distortions and memory effects, which are exacerbated by rapid changes in signal power levels, leading to inefficient energy use and potential spectral emission mask violations.

Innovation Solution

Dynamic Digital Pre-Distortion (DDPD) technique is employed, using a DDPD engine that predistorts input signals to cancel PA non-linearity and memory effects, implemented with a composite of linear filters and high-order term filters, and optimized hardware for rapid coefficient estimation and signal processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power amplifiers operate at high efficiency modes (Class C, Doherty), then energy efficiency improves, but non-linear distortions and memory effects worsen

Engineering Contradiction:
Improvepower amplifier efficiencyVSAvoidnon-linear distortions
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The system applies pre-distortion to the input signal before amplification, intentionally distorting the signal in advance to counteract the anticipated non-linear distortions of the high-efficiency power amplifier. This preliminary counter-action ensures that the combined effect of pre-distortion and amplifier non-linearity produces a linear output, allowing the amplifier to operate in high-efficiency modes without generating harmful distortions.

Inventive Principle:
Principle #9Preliminary anti-action

2Object-generated harmful factors

If digital signal processing is used to correct non-linearities, then distortion correction improves, but processing speed becomes insufficient for rapid power level changes

Engineering Contradiction:
Improvedistortion correctionVSAvoidprocessing speed
Core Design Contradiction:
Object-generated harmful factorsVSSpeed

Solution Approach 1:

The system replaces conventional software-based digital signal processing with a dedicated hardware implementation of the pre-distortion function. This hardware substitution provides the necessary processing speed to track rapid power level changes while maintaining accurate distortion correction, overcoming the speed limitations of software-based approaches.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Object-generated harmful factors

If conventional pre-distortion techniques are applied, then some non-linearity correction is achieved, but memory effects and dynamic signal variations are not adequately addressed

Engineering Contradiction:
Improvenon-linearity correctionVSAvoidhandling of memory effects
Core Design Contradiction:
Object-generated harmful factorsVSAdaptability or versatility

Solution Approach 1:

The system implements dynamic pre-distortion that continuously adapts to changing signal conditions and power amplifier characteristics. The pre-distortion parameters are updated in real-time based on feedback from the actual amplifier behavior, enabling the system to handle memory effects and dynamic signal variations that static pre-distortion techniques cannot address.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8005162B2Dynamic digital pre-distortion system
Publication Date: 2011.08.23 MICROELECTRONICS TECH INC
  • US8005162B2 patent drawing
  • US8005162B2 patent drawing
  • US8005162B2 patent drawing

AI summary

A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.