DDR Memory Module Channel Switching for Throughput and Thread Scaling

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Solution Overview

Problem

Modern servers face performance challenges due to increased memory channels reducing throughput, despite thread and channel proliferation, as server workload is not a simple function of the number of threads.

Innovation Solution

A memory module with dual inline memory modules (LRDIMMs) supporting two-channel and four-channel modes, utilizing independent command and data pathways, and a registered clock driver (RCD) to manage signals, allowing secure sharing of memory resources and optimizing channel numbers based on thread and memory capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of memory channels is increased to serve more processing units and threads, then the system can handle more concurrent processes, but the throughput of each individual channel is reduced, slowing down processes that require high channel throughput

Engineering Contradiction:
Improveconcurrent process handling capabilityVSAvoidper-channel throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The memory module dynamically switches between two-channel mode and four-channel mode based on workload requirements. The controller can select the appropriate operating mode to optimize performance for different process types: using four-channel mode for high-concurrency workloads and two-channel mode for throughput-critical operations, making the system adaptable to varying performance needs

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If more memory channels are provisioned to increase thread management capacity, then more threads can be managed independently, but the signal loading increases and performance optimization becomes more difficult

Engineering Contradiction:
Improvethread management capacityVSAvoidsignal loading and control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system dynamically adjusts the number of active channels based on thread management requirements. When high thread management capacity is needed, the system switches to four-channel mode with independent command and data pathways for each channel. When signal loading becomes excessive, the system transitions to two-channel mode, reducing complexity while maintaining adequate thread management capability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory module is segmented into multiple independent channels, each with its own command pathway and data pathway. This segmentation allows the system to activate only the necessary number of channels (two or four) based on workload requirements, managing signal loading by selectively enabling channels rather than maintaining all channels active simultaneously

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12547349B2Memory module with double data rate command and data interfaces supporting two-channel and four-channel modes
Publication Date: 2026.02.10 RAMBUS INC
  • US12547349B2 patent drawing
  • US12547349B2 patent drawing
  • US12547349B2 patent drawing

AI summary

A memory module supports multiple memory channel modes, each including a double-date-rate (DDR) data channel supported by an independent command-and-address (CA) channel. In a two-channel mode, the memory module supports two DDR data channels using two respective DDR CA channels. Each CA channel includes a corresponding set of CA links. In a four-channel mode, the memory module supports two pairs of DDR data channels, each pair supported by a pair of independent CA channels. Memory commands issued in the four-channel mode are time interleaved to share one of the sets of CA links.