DDR Memory Output Driver for CRC, Parity, and Precharge
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Solution Overview
Problem
Semiconductor devices, particularly DDR2, DDR3, and DDR4, face challenges in efficiently outputting internal information such as Cyclic Redundancy Checks (CRC) and command/address parity to external devices due to evolving specifications and increased operation speeds, which require adaptable circuit designs to handle new operations and parameters like Data Bus Inversion (DBI) and additional parameters.
Innovation Solution
The semiconductor device incorporates an information generation circuit, an information multiplexing circuit, and an information driving circuit to output internal information to an external device, utilizing PMOS and NMOS transistors to drive output pads in specific operation modes, enabling efficient output and precharge operations as per the JEDEC specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a dedicated driving circuit is added for each new specification operation (CRC, parity, DBI), then the device can comply with evolving specifications, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing a single driving circuit that can perform multiple functions: driving output pads for data output, precharging output pads, and outputting internal information such as CRC and parity. The circuit selectively responds to different control signals (data output control signal, precharge control signal, internal information output control signal) to execute different operations, thereby complying with evolving specifications without adding multiple dedicated circuits.
2Adaptability or versatility
If multiple driving circuits are added to handle different operation modes, then all specification requirements are met, but the area of the semiconductor device increases
Solution Approach 1:
The patent merges multiple driving circuits into a single integrated driving circuit. The circuit combines the functionality of data output driving, precharging, and internal information output into one unified structure. By merging these functions and using selective activation through control signals, the patent reduces the overall device area while maintaining full operation mode coverage required by specifications.
3Area of stationary object
If a single driving circuit is used for multiple functions, then device area is reduced, but the reliability of each specific function may decrease
Solution Approach 1:
The patent applies dynamics by making the driving circuit's functionality selectable and adaptive rather than fixed. The circuit dynamically responds to different control signals (data output control signal, precharge control signal, internal information output control signal) to execute different operations. This dynamic response mechanism ensures that each function is reliably executed by the same physical circuit structure, maintaining reliability while reducing area.
Data Source
AI summary
A semiconductor device includes an information generation circuit configured to generate first information, an information multiplexing circuit configured to multiplex the first information and second information, and an information driving circuit configured to drive an output pad in response to an output signal of the information multiplexing circuit.