DDR Package Interconnect Layout With Four-Layer Stripline Routing

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Solution Overview

Problem

Existing DDR bump pattern designs require a minimum of ten package layers, leading to increased Z-height, manufacturing costs, complexity, and EMI/RFI risks due to the need for multiple ground planes and signal routing layers.

Innovation Solution

A DDR routing architecture that reduces the package substrate layer count by removing one Vss ground layer from the top and corresponding layer from the backside, using alternating ground and signal traces offset from each other to ensure full grounding without additional layers, implementing a stripline routing architecture with four routing layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If five package layers are used for DDR routing with ground planes above and below each signal trace, then signal integrity is improved, but the Z-height of the package substrate is increased

Engineering Contradiction:

Improvesignal integrityVSAvoidZ-height

Core Design Contradiction:

ReliabilityVSLength of stationary object

Solution Approach 1:

The patent transitions from a traditional five-layer configuration with ground planes on both sides of signal traces to a four-layer configuration where ground traces are integrated within the same routing layers as signal traces. This dimensional reorganization allows alternating ground and signal traces to share layers, reducing the total layer count and Z-height while maintaining electromagnetic shielding through the alternating pattern design.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges ground and signal routing functions into the same layers by implementing alternating ground and signal traces within the same routing layers. This consolidation eliminates the need for separate dedicated ground layers, reducing the total layer count from five to four while maintaining signal integrity through the alternating pattern that provides electromagnetic shielding.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If five package layers are used for DDR routing, then ground reference is provided above and below signal traces, but manufacturing cost is increased

Engineering Contradiction:

Improveground referenceVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines ground and signal routing into the same layers through alternating trace patterns, reducing the total layer count from five to four. This merger eliminates redundant ground layers while maintaining ground reference above and below signal traces through the alternating pattern, thereby reducing manufacturing cost without compromising electromagnetic shielding.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If five package layers are used for DDR routing, then complete grounding is achieved, but device complexity is increased

Engineering Contradiction:

ImprovegroundingVSAvoidlayer count

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges ground and signal routing functions into the same four layers through alternating trace patterns, reducing the layer count from five to four. This integration maintains complete grounding by ensuring ground traces alternate with signal traces within the same layers, providing electromagnetic shielding without requiring separate dedicated ground layers.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent reorganizes the routing architecture from a vertical stacking of separate ground and signal layers to an integrated alternating pattern within the same layers. This dimensional change allows complete grounding to be achieved within fewer layers by utilizing the alternating pattern to provide ground reference in multiple directions without increasing layer count.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

4Device complexity

If eight layer configuration is used with microstrip routing, then layer count is reduced, but EMI and RFI risk increases

Engineering Contradiction:

Improvelayer countVSAvoidEMI and RFI risk

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent merges ground and signal routing into the same four layers through alternating trace patterns, achieving a compact four-layer configuration. This integration maintains electromagnetic shielding by ensuring ground traces alternate with signal traces within the same layers, providing ground reference above and below signal paths without the EMI and RFI risks associated with microstrip routing that lacks top ground reference.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20230395493A1On package interconnect architecture for high-speed memory

Publication Date: 2023.12.07 INTEL CORP

AI summary

Embodiments disclosed herein include package substrates. In an embodiment, a package substrate comprises a core, a first layer on the core, where the first layer comprises a first plane, a second layer on the first layer, where the second layer comprises first traces and second traces arranged in an alternating pattern, a third layer on the second layer, where the third layer comprises third traces and fourth traces arranged in an alternating pattern, and a fourth layer over the third layer, where the fourth layer comprises a second plane.