DDR Read Control for Multi-Source Video Frame Synchronization

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Solution Overview

Problem

In video surveillance systems using DDR dynamic random access memory, frame loss occurs when multiple video signals with different frame rates are synchronized to a primary signal, leading to discrepancies due to clock jitter or temperature changes, resulting in frame rate mismatches and losses.

Innovation Solution

A read/write control method and device for DDR dynamic random access memory that determines the minimum frame period across multiple signal sources, calculates frame period differences, and generates a read control signal to delay the rising edges of signals with longer frame periods, ensuring synchronized reading without frame loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple video signals with different frame rates are synchronized to a primary signal, then the system can process multiple signal sources simultaneously, but frame loss occurs due to clock jitter or temperature changes causing frame rate mismatches

Engineering Contradiction:
Improveability to process multiple signal sourcesVSAvoidframe loss
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements dynamic frame rate adjustment by introducing a frame rate conversion mechanism that adapts the frame rates of multiple video signals to match the primary signal's frame rate. The system dynamically adjusts the timing and sampling of input signals based on detected frame rate differences, preventing frame loss while maintaining the ability to process multiple signal sources with varying frame rates.

Inventive Principle:
Principle #15Dynamics

2Stability of the object's composition

If frame frequencies of other signal sources are matched to the frame frequency of the first signal source, then synchronization is achieved, but discrepancies occur due to clock jitter or temperature changes

Engineering Contradiction:
Improveframe frequency synchronizationVSAvoidframe rate mismatch
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent employs a feedback mechanism that continuously monitors the frame rates of multiple video signals and compares them against the primary signal's frame rate. When discrepancies are detected due to clock jitter or temperature changes, the system adjusts the frame rates of the synchronized signals in real-time to maintain accurate alignment, ensuring stable synchronization without accumulating frame rate mismatches.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12158851B2Read/write control method and device for DDR dynamic random access memory, and system
Publication Date: 2024.12.03 BEIJING BOE TECH DEV CO LTD
  • US12158851B2 patent drawing
  • US12158851B2 patent drawing
  • US12158851B2 patent drawing

AI summary

The disclosure provides a read/write control method and device for a DDR (Double Data Rate) dynamic random access memory, and a system. The device includes a read control signal generating unit and a read memory controller, and the read control signal generating unit is in signal connection with the read memory controller; the read control signal generating unit is configured for determining a minimum frame period from a plurality of received signal sources, generating a read control signal based on a delay time, and providing the read control signal to the read memory controller; and the read memory controller is configured for controlling the reading of video frames from the DDR dynamic random access memory according to the read control signal.